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https://opencores.org/ocsvn/neorv32/neorv32/trunk
[/] [neorv32/] [trunk/] [sw/] [common/] [crt0.S] - Diff between revs 40 and 41
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Rev 40 |
Rev 41 |
Line 185... |
Line 185... |
// clear cycle and instruction counters
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// clear cycle and instruction counters
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csrw mcycle, zero
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csrw mcycle, zero
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csrw mcycleh, zero
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csrw mcycleh, zero
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csrw minstret, zero
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csrw minstret, zero
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csrw minstreth, zero
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csrw minstreth, zero
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// enable read-access from user-mode for cycle[h], time[h] and instret[h]
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csrwi 0x306, 7 // mcounteren
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// enable auto-increment of all counters
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csrw 0x320, x0 // mcountinhibit
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// restore mcause reset value (so that 'main' knows we are coming from reset)
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// restore mcause reset value (so that 'main' knows we are coming from reset)
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li x12, 0x80000000
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li x12, 0x80000000
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csrw mcause, x12
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csrw mcause, x12
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