| Line 67... |
Line 67... |
addi x14, x0, 0
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addi x14, x0, 0
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addi x15, x0, 0
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addi x15, x0, 0
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// *********************************************************
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// *********************************************************
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// Initialize dummy trap handler base address
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// Setup pointers using linker script symbols
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// *********************************************************
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__crt0_pointer_init:
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.option push
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.option norelax
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la sp, __crt0_stack_begin
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andi sp, sp, 0xfffffffc // make sure this is aligned
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addi fp, sp, 0 // frame pointer = stack pointer
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la gp, __global_pointer$ // global pointer
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.option pop
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// *********************************************************
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// *********************************************************
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__crt0_neorv32_trap_init:
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// Setup CPU core CSRs (some of them DO NOT have a dedicated reset and need to be explicitly initialized)
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la x11, __crt0_dummy_trap_handler
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// *********************************************************
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csrw mtvec, x11 // set address of first-level exception handler
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__crt0_cpu_csr_init:
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// set address of first-level exception handler
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la x10, __crt0_dummy_trap_handler
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csrw mtvec, x10
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csrw mepc, x10
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csrw mtval, zero
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csrw mcause, zero
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// no global IRQ enable (is also done by hardware)
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csrw mstatus, zero
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// absolutely no interrupts, thanks
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csrw mie, zero
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// no access from less-privileged modes to counter CSRs
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csrw mcounteren, zero
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// stop all counters except for [m]cycle[h] and [m]instret[h]
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li x11, ~5
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csrw mcountinhibit, x11
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// clear cycle counters
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csrw mcycle, zero
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csrw mcycleh, zero
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// clear instruction counters
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csrw minstret, zero
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csrw minstreth, zero
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#if defined(__riscv_flen) && (__riscv_flen != 0)
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// clear floating-point CSR (rounding mode & exception flags)
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csrw fcsr, zero
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#endif
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// *********************************************************
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// *********************************************************
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// Clear integer register file (upper half, if no E extension)
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// Clear integer register file (upper half, if no E extension)
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// *********************************************************
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// *********************************************************
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| Line 101... |
Line 145... |
#endif
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#endif
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#endif
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#endif
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// *********************************************************
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// *********************************************************
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// No interrupts, thanks
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// *********************************************************
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__crt0_status_init:
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li x10, 0x00001800 // clear mstatus and set mpp(1:0)
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csrrw zero, mstatus, x10
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csrrw zero, mie, zero // clear mie
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// *********************************************************
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// Setup pointers using linker script symbols
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// *********************************************************
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__crt0_pointer_init:
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.option push
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.option norelax
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la sp, __crt0_stack_begin
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andi sp, sp, 0xfffffffc // make sure this is aligned
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addi fp, sp, 0 // frame pointer = stack pointer
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la gp, __global_pointer$ // global pointer
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.option pop
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// *********************************************************
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// Reset/deactivate IO/peripheral devices
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// Reset/deactivate IO/peripheral devices
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// Devices, that are not implemented, will cause a store access fault
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// Devices, that are not implemented, will cause a store access fault
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// which is captured but actually ignored due to the dummy handler.
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// which is captured but actually ignored due to the dummy handler.
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// *********************************************************
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// *********************************************************
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__crt0_reset_io:
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__crt0_reset_io:
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| Line 180... |
Line 202... |
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// setup arguments for calling main
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// setup arguments for calling main
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addi x10, zero, 0 // argc = 0
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addi x10, zero, 0 // argc = 0
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addi x11, zero, 0 // argv = 0
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addi x11, zero, 0 // argv = 0
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// clear cycle and instruction counters
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csrw mcycle, zero
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csrw mcycleh, zero
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csrw minstret, zero
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csrw minstreth, zero
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// enable read-access from user-mode for cycle[h], time[h] and instret[h]
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csrwi 0x306, 7 // mcounteren
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// enable auto-increment of all counters
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csrw 0x320, x0 // mcountinhibit
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// restore mcause reset value (so that 'main' knows we are coming from reset)
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li x12, 0x80000000
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csrw mcause, x12
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// call actual app's main function
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// call actual app's main function
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jal ra, main
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jal ra, main
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// *********************************************************
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// *********************************************************
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