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Line 1... |
/* ################################################################################################# */
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/* ################################################################################################# */
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/* # << NEORV32 - crt0.S - Application Start-Up Code >> # */
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/* # << NEORV32 - crt0.S - Application Start-Up Code & Minimal Runtime Environment >> # */
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/* # ********************************************************************************************* # */
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/* # ********************************************************************************************* # */
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/* # The start-up code provides a minimal runtime environment that catches all exceptions/ # */
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/* # The start-up code provides a minimal runtime environment that catches all exceptions and # */
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/* # interrupts and delegates them to the handler functions (installed by user via dedicated # */
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/* # interrupts and delegates them to the handler functions (installed by user via dedicated # */
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/* # install function from the neorv32 runtime environment library). # */
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/* # install function from the neorv32 runtime environment library). # */
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/* # ********************************************************************************************* # */
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/* # ********************************************************************************************* # */
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/* # BSD 3-Clause License # */
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/* # BSD 3-Clause License # */
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/* # # */
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/* # # */
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Line 115... |
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// *********************************************************
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// *********************************************************
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// Setup stack pointer
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// Setup stack pointer
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// *********************************************************
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// *********************************************************
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__crt0_stack_pointer_init:
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__crt0_stack_pointer_init:
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csrrw x11, CSR_MDSPACEBASE, zero // data memory space base address
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csrr x11, CSR_MDSPACEBASE // data memory space base address
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csrrw x12, CSR_MDSPACESIZE, zero // data memory space size
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csrr x12, CSR_MDSPACESIZE // data memory space size
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add sp, x11, x12
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add sp, x11, x12
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addi sp, sp, -4 // stack pointer = last entry
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addi sp, sp, -4 // stack pointer = last entry
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addi fp, sp, 0 // frame pointer = stack pointer
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addi fp, sp, 0 // frame pointer = stack pointer
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Line 137... |
// *********************************************************
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// *********************************************************
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// Init exception vector table (2x16 4-byte entries) with dummy handlers
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// Init exception vector table (2x16 4-byte entries) with dummy handlers
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// *********************************************************
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// *********************************************************
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__crt0_neorv32_rte_init:
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__crt0_neorv32_rte_init:
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la x11, __crt0_neorv32_rte
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la x11, __crt0_neorv32_rte
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csrrw zero, mtvec, x11 // set address of first-level exception handler
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csrw mtvec, x11 // set address of first-level exception handler
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csrrw x11, CSR_MDSPACEBASE, zero // data memory space base address
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csrr x11, CSR_MDSPACEBASE // data memory space base address
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la x12, __crt0_neorv32_rte_dummy_hanlder
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la x12, __crt0_neorv32_rte_dummy_hanlder
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li x13, 2*16 // number of entries (16xEXC, 16xIRQ)
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li x13, 2*16 // number of entries (16xEXC, 16xIRQ)
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__crt0_neorv32_rte_init_loop:
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__crt0_neorv32_rte_init_loop:
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sw x12, 0(x11) // set dummy handler
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sw x12, 0(x11) // set dummy handler
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Line 276... |
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// --------------------------------------------
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// --------------------------------------------
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// get cause and prepare jump into vector table
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// get cause and prepare jump into vector table
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// --------------------------------------------
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// --------------------------------------------
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csrrw t0, mcause, zero // get cause code
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csrr t0, mcause // get cause code
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andi t1, t0, 0x0f // isolate cause ID
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andi t1, t0, 0x0f // isolate cause ID
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slli t1, t1, 2 // make address offset
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slli t1, t1, 2 // make address offset
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csrrw ra, CSR_MDSPACEBASE, zero // data memory space base address
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csrr ra, CSR_MDSPACEBASE // data memory space base address
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add t1, t1, ra // get vetor table entry address (EXC vectors)
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add t1, t1, ra // get vetor table entry address (EXC vectors)
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csrrw ra, mepc, zero // get return address
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csrr ra, mepc // get return address
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blt t0, zero, __crt0_neorv32_rte_is_irq // branch if this is an INTERRUPT
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blt t0, zero, __crt0_neorv32_rte_is_irq // branch if this is an INTERRUPT
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// --------------------------------------------
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// --------------------------------------------
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// compute return address for EXCEPTIONS only
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// compute return address for EXCEPTIONS only
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// --------------------------------------------
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// --------------------------------------------
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__crt0_neorv32_rte_is_exc:
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__crt0_neorv32_rte_is_exc:
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// is faulting instruction compressed?
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// is faulting instruction compressed?
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csrrw t0, mtinst, zero
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csrr t0, mtinst
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andi t0, t0, 2 // get compression flag (bit #1): 0=compressed, 2=uncompressed
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andi t0, t0, 2 // get compression flag (bit #1): 0=compressed, 1=uncompressed
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addi ra, ra, +2 // only this for compressed instr
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addi ra, ra, +2 // only this for compressed instructions
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add ra, ra, t0 // add another 2 (0+4) for uncompressed instr
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add ra, ra, t0 // add another 2 (making +4) for uncompressed instructions
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j __crt0_neorv32_rte_execute
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j __crt0_neorv32_rte_execute
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// --------------------------------------------
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// --------------------------------------------
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// vector table offset for INTERRUPTS only
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// vector table offset for INTERRUPTS only
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Line 318... |
lw t0, 0(t1) // get base address of second-level handler
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lw t0, 0(t1) // get base address of second-level handler
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// push ra
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// push ra
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addi sp, sp, -4
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addi sp, sp, -4
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sw ra, 0(sp)
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sw ra, 0(sp)
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csrrw zero, mscratch, ra
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jalr ra, t0 // call second-level handler
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jalr ra, t0 // call second-level handler
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// pop ra
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// pop ra
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lw ra, 0(sp)
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lw ra, 0(sp)
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addi sp, sp, +4
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addi sp, sp, +4
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csrrw zero, mepc, ra
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csrw mepc, ra
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// --------------------------------------------
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// --------------------------------------------
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// full context restore
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// full context restore
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// --------------------------------------------
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// --------------------------------------------
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