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// #################################################################################################
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// #################################################################################################
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// # << NEORV32 - RISC-V Bit-Manipulation 'Zbb' Extension Test Program >> #
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// # << NEORV32 - RISC-V Bit-Manipulation 'B' Extension Test Program >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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/**********************************************************************//**
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/**********************************************************************//**
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* @file bitmanip_test/main.c
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* @file bitmanip_test/main.c
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* @author Stephan Nolting
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* @author Stephan Nolting
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* @brief Test program for the NEORV32 'Zbb' extension using pseudo-random
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* @brief Test program for the NEORV32 'B` extension using pseudo-random
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* data as input; compares results from hardware against pure-sw reference functions.
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* data as input; compares results from hardware against pure-sw reference functions.
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**************************************************************************/
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**************************************************************************/
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#include <neorv32.h>
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#include <neorv32.h>
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#include "neorv32_b_extension_intrinsics.h"
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#include "neorv32_b_extension_intrinsics.h"
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/**********************************************************************//**
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/**********************************************************************//**
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* Main function; test all available operations of the NEORV32 'Zbb' extensions
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* Main function; test all available operations of the NEORV32 'Zbb' extensions
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* using bit manipulation intrinsics and software-only reference functions (emulation).
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* using bit manipulation intrinsics and software-only reference functions (emulation).
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*
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*
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* @note This program requires the Zbb CPU extension.
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* @note This program requires the bit-manipulation CPU extension.
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*
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*
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* @return Irrelevant.
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* @return Irrelevant.
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**************************************************************************/
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**************************************************************************/
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int main() {
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int main() {
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return 1;
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return 1;
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#endif
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#endif
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// intro
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// intro
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neorv32_uart0_printf("NEORV32 'Zbb' Bit-Manipulation Extension Test\n\n");
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neorv32_uart0_printf("NEORV32 Bit-Manipulation Extension Test (Zba, Zbb)\n\n");
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// check available hardware extensions and compare with compiler flags
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// check available hardware extensions and compare with compiler flags
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neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
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neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
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// check if Zbb extension is implemented at all
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// check if Zbb extension is implemented at all
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if ((NEORV32_SYSINFO.CPU & (1<<SYSINFO_CPU_ZBB)) == 0) {
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if ((neorv32_cpu_csr_read(CSR_MISA) & (1<<CSR_MISA_B)) == 0) {
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neorv32_uart0_print("Error! <Zbb> extension not synthesized!\n");
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neorv32_uart0_print("Error! <B> extension not synthesized!\n");
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return 1;
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return 1;
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}
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}
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neorv32_uart0_printf("Starting Zbb bit-manipulation extension tests (%i test cases per instruction)...\n", num_tests);
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neorv32_uart0_printf("Starting bit-manipulation extension tests (%i test cases per instruction)...\n\n", num_tests);
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neorv32_uart0_printf("-----------------------------------------\n");
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neorv32_uart0_printf("Zbb - Basic bit-manipulation instructions\n");
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neorv32_uart0_printf("-----------------------------------------\n");
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// ANDN
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// ANDN
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neorv32_uart0_printf("\nANDN:\n");
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neorv32_uart0_printf("\nANDN:\n");
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err_cnt = 0;
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err_cnt = 0;
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for (i=0;i<num_tests; i++) {
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for (i=0;i<num_tests; i++) {
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err_cnt += check_result(i, opa, 0, res_sw, res_hw);
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err_cnt += check_result(i, opa, 0, res_sw, res_hw);
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}
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}
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print_report(err_cnt, num_tests);
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print_report(err_cnt, num_tests);
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neorv32_uart0_printf("\n\n");
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neorv32_uart0_printf("-----------------------------------------\n");
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neorv32_uart0_printf("Zba - Address generation instructions\n");
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neorv32_uart0_printf("-----------------------------------------\n");
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// SH1ADD
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neorv32_uart0_printf("\nSH1ADD:\n");
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err_cnt = 0;
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for (i=0;i<num_tests; i++) {
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opa = xorshift32();
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opb = xorshift32();
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res_sw = riscv_emulate_sh1add(opa, opb);
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res_hw = riscv_intrinsic_sh1add(opa, opb);
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err_cnt += check_result(i, opa, opb, res_sw, res_hw);
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}
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print_report(err_cnt, num_tests);
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// SH2ADD
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neorv32_uart0_printf("\nSH2ADD:\n");
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err_cnt = 0;
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for (i=0;i<num_tests; i++) {
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opa = xorshift32();
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opb = xorshift32();
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res_sw = riscv_emulate_sh2add(opa, opb);
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res_hw = riscv_intrinsic_sh2add(opa, opb);
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err_cnt += check_result(i, opa, opb, res_sw, res_hw);
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}
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print_report(err_cnt, num_tests);
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// SH2ADD
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neorv32_uart0_printf("\nSH3ADD:\n");
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err_cnt = 0;
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for (i=0;i<num_tests; i++) {
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opa = xorshift32();
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res_sw = riscv_emulate_sh3add(opa, opb);
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res_hw = riscv_intrinsic_sh3add(opa, opb);
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err_cnt += check_result(i, opa, opb, res_sw, res_hw);
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}
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print_report(err_cnt, num_tests);
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neorv32_uart0_printf("\nBit manipulation extension tests done.\n");
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neorv32_uart0_printf("\nBit manipulation extension tests done.\n");
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return 0;
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return 0;
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}
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}
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