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[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32.h] - Diff between revs 22 and 23

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/**********************************************************************//**
/**********************************************************************//**
 * @name Address space sections
 * @name Address space sections
 **************************************************************************/
 **************************************************************************/
/**@{*/
/**@{*/
/** instruction memory base address (r/w/x) */
/** instruction memory base address (r/w/x) */
// -> use value from MEM_ISPACE_BASE generic
// -> configured via ispace_base_c constant in neorv32_package.vhd and available to SW via SYSCONFIG entry
/** data memory base address (r/w/x) */
/** data memory base address (r/w/x) */
// -> use value from MEM_DSPACE_BASE generic
// -> configured via dspace_base_c constant in neorv32_package.vhd and available to SW via SYSCONFIG entry
/** bootloader memory base address (r/-/x) */
/** bootloader memory base address (r/-/x) */
#define BOOTLOADER_BASE_ADDRESS (0xFFFF0000UL)
#define BOOTLOADER_BASE_ADDRESS (0xFFFF0000UL)
/** peripheral/IO devices memory base address (r/w/x) */
/** peripheral/IO devices memory base address (r/w/x) */
#define IO_BASE_ADDRESS (0xFFFFFF80UL)
#define IO_BASE_ADDRESS (0xFFFFFF80UL)
/**@}*/
/**@}*/
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/**********************************************************************//**
/**********************************************************************//**
 * @name IO Device: General Purpose Input/Output Port Unit (GPIO)
 * @name IO Device: General Purpose Input/Output Port Unit (GPIO)
 **************************************************************************/
 **************************************************************************/
/**@{*/
/**@{*/
/** GPIO parallel input port 32-bit (r/-) */
/** read access: GPIO parallel input port 32-bit (r/-), write_access: pin-change IRQ for each input pin (-/w) */
#define GPIO_INPUT  (*(IO_ROM32 0xFFFFFF80UL))
#define GPIO_INPUT  (*(IO_REG32 0xFFFFFF80UL))
/** GPIO parallel output port 32-bit (r/w) */
/** GPIO parallel output port 32-bit (r/w) */
#define GPIO_OUTPUT (*(IO_REG32 0xFFFFFF84UL))
#define GPIO_OUTPUT (*(IO_REG32 0xFFFFFF84UL))
/**@}*/
/**@}*/
 
 
 
 
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/**********************************************************************//**
/**********************************************************************//**
 * @name IO Device: True Random Number Generator (TRNG)
 * @name IO Device: True Random Number Generator (TRNG)
 **************************************************************************/
 **************************************************************************/
/**@{*/
/**@{*/
/** TRNG control register (r/w) */
/** TRNG control/data register (r/w) */
#define TRNG_CT   (*(IO_REG32 0xFFFFFFC0UL))
#define TRNG_CT   (*(IO_REG32 0xFFFFFFC0UL))
/** TRNG data register (r/-) */
 
#define TRNG_DATA (*(IO_ROM32 0xFFFFFFC4UL))
 
 
 
/** TRNG control register bits */
/** TRNG control/data register bits */
enum NEORV32_TRNG_CT_enum {
enum NEORV32_TRNG_CT_enum {
  TRNG_CT_TAP_LSB =  0, /**< TRNG control register(0)  (r/w): TAP mask (16-bit) LSB */
  TRNG_CT_DATA_LSB =  0, /**< TRNG data/control register(0)  (r/-): Random data (8-bit) LSB */
  TRNG_CT_TAP_MSB = 15, /**< TRNG control register(15) (r/w): TAP mask (16-bit) MSB */
  TRNG_CT_DATA_MSB =  7, /**< TRNG data/control register(7)  (r/-): Random data (8-bit) MSB */
  TRNG_CT_EN      = 31  /**< TRNG control register(31) (r/w): TRNG enable */
  TRNG_CT_VALID    = 15, /**< TRNG data/control register(15) (r/-): Random data output valid */
 
  TRNG_CT_ERROR_0  = 16, /**< TRNG data/control register(16) (r/-): Stuck-at-zero error */
 
  TRNG_CT_ERROR_1  = 17, /**< TRNG data/control register(17) (r/-): Stuck-at-one error */
 
  TRNG_CT_EN       = 31  /**< TRNG data/control register(31) (r/w): TRNG enable */
};
};
 
/**@}*/
 
/**@}*/
 
 
/** WTD data register bits */
 
enum NEORV32_TRNG_DUTY_enum {
/**********************************************************************//**
  TRNG_DATA_LSB   =  0, /**< TRNG data register(0)  (r/-): Random data (16-bit) LSB */
 * @name IO Device: Custom Functions Unit (CFU)
  TRNG_DATA_MSB   = 15, /**< TRNG data register(15) (r/-): Random data (16-bit) MSB */
 **************************************************************************/
  TRNG_DATA_VALID = 31  /**< TRNG data register(31) (r/-): Random data output valid */
/**@{*/
};
/** CFU register 0 ((r)/(w)) */
 
#define CFU_REG_0 (*(IO_REG32 0xFFFFFFD0UL)) // (r)/(w): CFU register 0, user-defined
 
/** CFU register 1 ((r)/(w)) */
 
#define CFU_REG_1 (*(IO_REG32 0xFFFFFFD4UL)) // (r)/(w): CFU register 1, user-defined
 
/** CFU register 2 ((r)/(w)) */
 
#define CFU_REG_2 (*(IO_REG32 0xFFFFFFD8UL)) // (r)/(w): CFU register 2, user-defined
 
/** CFU register 3 ((r)/(w)) */
 
#define CFU_REG_3 (*(IO_REG32 0xFFFFFFDCUL)) // (r)/(w): CFU register 3, user-defined
/**@}*/
/**@}*/
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * @name IO Device: System Configuration Info Memory (SYSINFO)
 * @name IO Device: System Configuration Info Memory (SYSINFO)
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/** SYSINFO(1): Custom user code (via "USER_CODE" generic) */
/** SYSINFO(1): Custom user code (via "USER_CODE" generic) */
#define SYSINFO_USER_CODE   (*(IO_ROM32 0xFFFFFFE4UL))
#define SYSINFO_USER_CODE   (*(IO_ROM32 0xFFFFFFE4UL))
/** SYSINFO(2): Clock speed */
/** SYSINFO(2): Clock speed */
#define SYSINFO_FEATURES    (*(IO_ROM32 0xFFFFFFE8UL))
#define SYSINFO_FEATURES    (*(IO_ROM32 0xFFFFFFE8UL))
/** SYSINFO(3): reserved */
/** SYSINFO(3): reserved */
#define SYSINFO_reserved1   (*(IO_ROM32 0xFFFFFFECUL))
#define SYSINFO_reserved    (*(IO_ROM32 0xFFFFFFECUL))
/** SYSINFO(4): Instruction memory address space base */
/** SYSINFO(4): Instruction memory address space base */
#define SYSINFO_ISPACE_BASE (*(IO_ROM32 0xFFFFFFF0UL))
#define SYSINFO_ISPACE_BASE (*(IO_ROM32 0xFFFFFFF0UL))
/** SYSINFO(5): Data memory address space base */
/** SYSINFO(5): Data memory address space base */
#define SYSINFO_DSPACE_BASE (*(IO_ROM32 0xFFFFFFF4UL))
#define SYSINFO_DSPACE_BASE (*(IO_ROM32 0xFFFFFFF4UL))
/** SYSINFO(6): Instruction memory address space size in bytes */
/** SYSINFO(6): Internal instruction memory (IMEM) size in bytes */
#define SYSINFO_ISPACE_SIZE (*(IO_ROM32 0xFFFFFFF8UL))
#define SYSINFO_IMEM_SIZE   (*(IO_ROM32 0xFFFFFFF8UL))
/** SYSINFO(7): Data memory address space size in bytes */
/** SYSINFO(7): Internal data memory (DMEM) size in bytes */
#define SYSINFO_DSPACE_SIZE (*(IO_ROM32 0xFFFFFFFCUL))
#define SYSINFO_DMEM_SIZE   (*(IO_ROM32 0xFFFFFFFCUL))
/**@}*/
/**@}*/
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * SYSINFO_FEATURES (r/-): Implemented processor devices/features
 * SYSINFO_FEATURES (r/-): Implemented processor devices/features
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  SYSINFO_FEATURES_IO_UART          = 18, /**< SYSINFO_FEATURES (18) (r/-): Universal asynchronous receiver/transmitter implemented when 1 (via IO_UART_USE generic) */
  SYSINFO_FEATURES_IO_UART          = 18, /**< SYSINFO_FEATURES (18) (r/-): Universal asynchronous receiver/transmitter implemented when 1 (via IO_UART_USE generic) */
  SYSINFO_FEATURES_IO_SPI           = 19, /**< SYSINFO_FEATURES (19) (r/-): Serial peripheral interface implemented when 1 (via IO_SPI_USE generic) */
  SYSINFO_FEATURES_IO_SPI           = 19, /**< SYSINFO_FEATURES (19) (r/-): Serial peripheral interface implemented when 1 (via IO_SPI_USE generic) */
  SYSINFO_FEATURES_IO_TWI           = 20, /**< SYSINFO_FEATURES (20) (r/-): Two-wire interface implemented when 1 (via IO_TWI_USE generic) */
  SYSINFO_FEATURES_IO_TWI           = 20, /**< SYSINFO_FEATURES (20) (r/-): Two-wire interface implemented when 1 (via IO_TWI_USE generic) */
  SYSINFO_FEATURES_IO_PWM           = 21, /**< SYSINFO_FEATURES (21) (r/-): Pulse-width modulation unit implemented when 1 (via IO_PWM_USE generic) */
  SYSINFO_FEATURES_IO_PWM           = 21, /**< SYSINFO_FEATURES (21) (r/-): Pulse-width modulation unit implemented when 1 (via IO_PWM_USE generic) */
  SYSINFO_FEATURES_IO_WDT           = 22, /**< SYSINFO_FEATURES (22) (r/-): Watchdog timer implemented when 1 (via IO_WDT_USE generic) */
  SYSINFO_FEATURES_IO_WDT           = 22, /**< SYSINFO_FEATURES (22) (r/-): Watchdog timer implemented when 1 (via IO_WDT_USE generic) */
 
  SYSINFO_FEATURES_IO_CFU           = 23, /**< SYSINFO_FEATURES (23) (r/-): Custom functions unit implemented when 1 (via IO_CFU_USE generic) */
  SYSINFO_FEATURES_IO_TRNG          = 24, /**< SYSINFO_FEATURES (24) (r/-): True random number generator implemented when 1 (via IO_TRNG_USE generic) */
  SYSINFO_FEATURES_IO_TRNG          = 24, /**< SYSINFO_FEATURES (24) (r/-): True random number generator implemented when 1 (via IO_TRNG_USE generic) */
  SYSINFO_FEATURES_IO_DEVNULL       = 25  /**< SYSINFO_FEATURES (24) (r/-): Dummy device implemented when 1 (via IO_DEVNULL_USE generic) */
  SYSINFO_FEATURES_IO_DEVNULL       = 25  /**< SYSINFO_FEATURES (25) (r/-): Dummy device implemented when 1 (via IO_DEVNULL_USE generic) */
};
};
 
 
 
 
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
// Include all IO driver headers
// Include all IO driver headers

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