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#define neorv32_cpu_h
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#define neorv32_cpu_h
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// prototypes
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// prototypes
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int neorv32_cpu_irq_enable(uint8_t irq_sel);
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int neorv32_cpu_irq_enable(uint8_t irq_sel);
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int neorv32_cpu_irq_disable(uint8_t irq_sel);
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int neorv32_cpu_irq_disable(uint8_t irq_sel);
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uint64_t neorv32_cpu_get_cycle(void);
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void neorv32_cpu_set_mcycle(uint64_t value);
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uint64_t neorv32_cpu_get_instret(void);
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void neorv32_cpu_set_minstret(uint64_t value);
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uint64_t neorv32_cpu_get_systime(void);
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void neorv32_cpu_delay_ms(uint32_t time_ms);
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void neorv32_cpu_delay_ms(uint32_t time_ms);
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/**********************************************************************//**
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/**********************************************************************//**
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* Read data from CPU configuration and status register (CSR).
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* Read data from CPU configuration and status register (CSR).
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asm volatile ("csrrci zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
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asm volatile ("csrrci zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Trigger machine software interrupt.
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*
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* @note The according IRQ has to be enabled via neorv32_cpu_irq_enable(uint8_t irq_sel) and
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* global interrupts must be enabled via neorv32_cpu_eint(void) to trigger an IRQ via software.
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* The MSI becomes active after 3 clock cycles.
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**************************************************************************/
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inline void __attribute__ ((always_inline)) neorv32_cpu_sw_irq(void) {
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asm volatile ("csrrsi zero, mip, %0" : : "i" (1 << CPU_MIP_MSIP));
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// the MSI becomes active 3 clock cycles afters issueing
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asm volatile ("nop"); // these nops are not required, they just make sure the MSI becomes active
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asm volatile ("nop"); // before the "real" next operation is executed
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}
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/**********************************************************************//**
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* Trigger breakpoint exception (via EBREAK instruction).
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* Trigger breakpoint exception (via EBREAK instruction).
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**************************************************************************/
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**************************************************************************/
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inline void __attribute__ ((always_inline)) neorv32_cpu_breakpoint(void) {
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inline void __attribute__ ((always_inline)) neorv32_cpu_breakpoint(void) {
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asm volatile ("ebreak");
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asm volatile ("ebreak");
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