| Line 51... |
Line 51... |
void neorv32_cpu_set_minstret(uint64_t value);
|
void neorv32_cpu_set_minstret(uint64_t value);
|
uint64_t neorv32_cpu_get_systime(void);
|
uint64_t neorv32_cpu_get_systime(void);
|
void neorv32_cpu_delay_ms(uint32_t time_ms);
|
void neorv32_cpu_delay_ms(uint32_t time_ms);
|
void __attribute__((naked)) neorv32_cpu_goto_user_mode(void);
|
void __attribute__((naked)) neorv32_cpu_goto_user_mode(void);
|
int neorv32_cpu_atomic_cas(uint32_t addr, uint32_t expected, uint32_t desired);
|
int neorv32_cpu_atomic_cas(uint32_t addr, uint32_t expected, uint32_t desired);
|
|
uint32_t neorv32_cpu_pmp_get_granularity(void);
|
|
int neorv32_cpu_pmp_configure_region(uint32_t index, uint32_t base, uint32_t size, uint8_t config);
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* Read data from CPU configuration and status register (CSR).
|
* Read data from CPU configuration and status register (CSR).
|
*
|
*
|
| Line 105... |
Line 107... |
* Enable global CPU interrupts (via MIE flag in mstatus CSR).
|
* Enable global CPU interrupts (via MIE flag in mstatus CSR).
|
**************************************************************************/
|
**************************************************************************/
|
inline void __attribute__ ((always_inline)) neorv32_cpu_eint(void) {
|
inline void __attribute__ ((always_inline)) neorv32_cpu_eint(void) {
|
|
|
asm volatile ("csrrsi zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
|
asm volatile ("csrrsi zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
|
|
asm volatile ("nop");
|
|
asm volatile ("nop");
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* Disable global CPU interrupts (via MIE flag in mstatus CSR).
|
* Disable global CPU interrupts (via MIE flag in mstatus CSR).
|
**************************************************************************/
|
**************************************************************************/
|
inline void __attribute__ ((always_inline)) neorv32_cpu_dint(void) {
|
inline void __attribute__ ((always_inline)) neorv32_cpu_dint(void) {
|
|
|
asm volatile ("csrrci zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
|
asm volatile ("csrrci zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
|
|
asm volatile ("nop");
|
|
asm volatile ("nop");
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* Trigger breakpoint exception (via EBREAK instruction).
|
* Trigger breakpoint exception (via EBREAK instruction).
|
