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// #################################################################################################
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// #################################################################################################
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// # << NEORV32: neorv32_cpu.h - CPU Core Functions HW Driver >> #
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// # << NEORV32: neorv32_cpu.h - CPU Core Functions HW Driver >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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void neorv32_cpu_set_minstret(uint64_t value);
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void neorv32_cpu_set_minstret(uint64_t value);
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uint64_t neorv32_cpu_get_systime(void);
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uint64_t neorv32_cpu_get_systime(void);
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void neorv32_cpu_delay_ms(uint32_t time_ms);
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void neorv32_cpu_delay_ms(uint32_t time_ms);
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void __attribute__((naked)) neorv32_cpu_goto_user_mode(void);
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void __attribute__((naked)) neorv32_cpu_goto_user_mode(void);
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int neorv32_cpu_atomic_cas(uint32_t addr, uint32_t expected, uint32_t desired);
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int neorv32_cpu_atomic_cas(uint32_t addr, uint32_t expected, uint32_t desired);
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uint32_t neorv32_cpu_pmp_get_num_regions(void);
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uint32_t neorv32_cpu_pmp_get_granularity(void);
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uint32_t neorv32_cpu_pmp_get_granularity(void);
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int neorv32_cpu_pmp_configure_region(uint32_t index, uint32_t base, uint32_t size, uint8_t config);
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int neorv32_cpu_pmp_configure_region(uint32_t index, uint32_t base, uint32_t size, uint8_t config);
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uint32_t neorv32_cpu_hpm_get_counters(void);
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/**********************************************************************//**
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/**********************************************************************//**
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* Read data from CPU configuration and status register (CSR).
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* Read data from CPU configuration and status register (CSR).
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*
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*
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* @param[in] csr_id ID of CSR to read. See #NEORV32_CPU_CSRS_enum.
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* @param[in] csr_id ID of CSR to read. See #NEORV32_CSR_enum.
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* @return Read data (uint32_t).
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* @return Read data (uint32_t).
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**************************************************************************/
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**************************************************************************/
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inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_csr_read(const int csr_id) {
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inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_csr_read(const int csr_id) {
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register uint32_t csr_data;
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register uint32_t csr_data;
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/**********************************************************************//**
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/**********************************************************************//**
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* Write data to CPU configuration and status register (CSR).
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* Write data to CPU configuration and status register (CSR).
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*
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*
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* @param[in] csr_id ID of CSR to write. See #NEORV32_CPU_CSRS_enum.
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* @param[in] csr_id ID of CSR to write. See #NEORV32_CSR_enum.
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* @param[in] data Data to write (uint32_t).
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* @param[in] data Data to write (uint32_t).
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**************************************************************************/
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**************************************************************************/
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inline void __attribute__ ((always_inline)) neorv32_cpu_csr_write(const int csr_id, uint32_t data) {
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inline void __attribute__ ((always_inline)) neorv32_cpu_csr_write(const int csr_id, uint32_t data) {
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register uint32_t csr_data = data;
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register uint32_t csr_data = data;
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/**********************************************************************//**
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/**********************************************************************//**
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* Enable global CPU interrupts (via MIE flag in mstatus CSR).
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* Enable global CPU interrupts (via MIE flag in mstatus CSR).
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**************************************************************************/
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**************************************************************************/
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inline void __attribute__ ((always_inline)) neorv32_cpu_eint(void) {
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inline void __attribute__ ((always_inline)) neorv32_cpu_eint(void) {
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asm volatile ("csrrsi zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
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asm volatile ("csrrsi zero, mstatus, %0" : : "i" (1 << CSR_MSTATUS_MIE));
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Disable global CPU interrupts (via MIE flag in mstatus CSR).
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* Disable global CPU interrupts (via MIE flag in mstatus CSR).
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**************************************************************************/
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**************************************************************************/
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inline void __attribute__ ((always_inline)) neorv32_cpu_dint(void) {
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inline void __attribute__ ((always_inline)) neorv32_cpu_dint(void) {
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asm volatile ("csrrci zero, mstatus, %0" : : "i" (1 << CPU_MSTATUS_MIE));
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asm volatile ("csrrci zero, mstatus, %0" : : "i" (1 << CSR_MSTATUS_MIE));
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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asm volatile ("nop");
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}
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}
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