OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32_spi.h] - Diff between revs 66 and 70

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 66 Rev 70
Line 1... Line 1...
// #################################################################################################
// #################################################################################################
// # << NEORV32: neorv32_spi.h - Serial Peripheral Interface Controller (SPI) HW Driver >>         #
// # << NEORV32: neorv32_spi.h - Serial Peripheral Interface Controller (SPI) HW Driver >>         #
// # ********************************************************************************************* #
// # ********************************************************************************************* #
// # BSD 3-Clause License                                                                          #
// # BSD 3-Clause License                                                                          #
// #                                                                                               #
// #                                                                                               #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved.                                     #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved.                                     #
// #                                                                                               #
// #                                                                                               #
// # Redistribution and use in source and binary forms, with or without modification, are          #
// # Redistribution and use in source and binary forms, with or without modification, are          #
// # permitted provided that the following conditions are met:                                     #
// # permitted provided that the following conditions are met:                                     #
// #                                                                                               #
// #                                                                                               #
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
Line 47... Line 47...
// prototypes
// prototypes
int neorv32_spi_available(void);
int neorv32_spi_available(void);
void neorv32_spi_setup(uint8_t prsc, uint8_t clk_phase, uint8_t clk_polarity, uint8_t data_size);
void neorv32_spi_setup(uint8_t prsc, uint8_t clk_phase, uint8_t clk_polarity, uint8_t data_size);
void neorv32_spi_disable(void);
void neorv32_spi_disable(void);
void neorv32_spi_enable(void);
void neorv32_spi_enable(void);
 
void neorv32_spi_highspeed_enable(void);
 
void neorv32_spi_highspeed_disable(void);
void neorv32_spi_cs_en(uint8_t cs);
void neorv32_spi_cs_en(uint8_t cs);
void neorv32_spi_cs_dis(uint8_t cs);
void neorv32_spi_cs_dis(uint8_t cs);
uint32_t neorv32_spi_trans(uint32_t tx_data);
uint32_t neorv32_spi_trans(uint32_t tx_data);
void neorv32_spi_put_nonblocking(uint32_t tx_data);
void neorv32_spi_put_nonblocking(uint32_t tx_data);
uint32_t neorv32_spi_get_nonblocking(void);
uint32_t neorv32_spi_get_nonblocking(void);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.