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[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_cpu.c] - Diff between revs 61 and 63

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Rev 61 Rev 63
Line 330... Line 330...
 * @return Returns number of available PMP regions.
 * @return Returns number of available PMP regions.
 **************************************************************************/
 **************************************************************************/
uint32_t neorv32_cpu_pmp_get_num_regions(void) {
uint32_t neorv32_cpu_pmp_get_num_regions(void) {
 
 
  // PMP implemented at all?
  // PMP implemented at all?
  if ((neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CSR_MZEXT_PMP)) == 0) {
  if ((SYSINFO_CPU & (1<<SYSINFO_CPU_PMP)) == 0) {
    return 0;
    return 0;
  }
  }
 
 
  uint32_t i = 0;
  uint32_t i = 0;
 
 
Line 595... Line 595...
 * @return Returns number of available HPM counters (0..29).
 * @return Returns number of available HPM counters (0..29).
 **************************************************************************/
 **************************************************************************/
uint32_t neorv32_cpu_hpm_get_counters(void) {
uint32_t neorv32_cpu_hpm_get_counters(void) {
 
 
  // HPMs implemented at all?
  // HPMs implemented at all?
  if ((neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CSR_MZEXT_HPM)) == 0) {
  if ((SYSINFO_CPU & (1<<SYSINFO_CPU_HPM)) == 0) {
    return 0;
    return 0;
  }
  }
 
 
  // inhibit all HPM counters
  // inhibit all HPM counters
  uint32_t tmp = neorv32_cpu_csr_read(CSR_MCOUNTINHIBIT);
  uint32_t tmp = neorv32_cpu_csr_read(CSR_MCOUNTINHIBIT);
Line 678... Line 678...
 * @return Size of HPM counter bits (1-64, 0 if not implemented at all).
 * @return Size of HPM counter bits (1-64, 0 if not implemented at all).
 **************************************************************************/
 **************************************************************************/
uint32_t neorv32_cpu_hpm_get_size(void) {
uint32_t neorv32_cpu_hpm_get_size(void) {
 
 
  // HPMs implemented at all?
  // HPMs implemented at all?
  if ((neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CSR_MZEXT_HPM)) == 0) {
  if ((SYSINFO_CPU & (1<<SYSINFO_CPU_HPM)) == 0) {
    return 0;
    return 0;
  }
  }
 
 
  // inhibt auto-update
  // inhibt auto-update
  asm volatile ("csrwi %[addr], %[imm]" : : [addr] "i" (CSR_MCOUNTINHIBIT), [imm] "i" (1<<CSR_MCOUNTINHIBIT_HPM3));
  asm volatile ("csrwi %[addr], %[imm]" : : [addr] "i" (CSR_MCOUNTINHIBIT), [imm] "i" (1<<CSR_MCOUNTINHIBIT_HPM3));
Line 709... Line 709...
 
 
  return size;
  return size;
}
}
 
 
 
 
/**********************************************************************//**
 
 * Check if certain Z* extension is available
 
 *
 
 * @param[in] flag_id Index of the Z-extension to check from #NEORV32_CSR_MZEXT_enum
 
 * @return 0 if extension is NOT available, != 0 if extension is available.
 
 **************************************************************************/
 
int neorv32_cpu_check_zext(uint8_t flag_id) {
 
 
 
  // check if out of range
 
  if (flag_id > 31) {
 
    return 0;
 
  }
 
 
 
  uint32_t mask = (uint32_t)(1 << flag_id);
 
  if ((neorv32_cpu_csr_read(CSR_MZEXT) & mask) == 0) {
 
    return 0;
 
  }
 
  else {
 
    return 1;
 
  }
 
}
 
 
 
 
 
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