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// #################################################################################################
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// #################################################################################################
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// # << NEORV32: neorv32_cpu.c - CPU Core Functions HW Driver >> #
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// # << NEORV32: neorv32_cpu.c - CPU Core Functions HW Driver >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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**************************************************************************/
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**************************************************************************/
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uint64_t neorv32_cpu_get_cycle(void) {
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uint64_t neorv32_cpu_get_cycle(void) {
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union {
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union {
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uint64_t uint64;
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uint64_t uint64;
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uint32_t uint32[sizeof(uint64_t)/2];
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uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)];
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} cycles;
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} cycles;
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register uint32_t tmp1, tmp2, tmp3;
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register uint32_t tmp1, tmp2, tmp3;
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while(1) {
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while(1) {
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tmp1 = neorv32_cpu_csr_read(CSR_CYCLEH);
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tmp1 = neorv32_cpu_csr_read(CSR_CYCLEH);
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**************************************************************************/
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**************************************************************************/
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void neorv32_cpu_set_mcycle(uint64_t value) {
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void neorv32_cpu_set_mcycle(uint64_t value) {
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union {
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union {
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uint64_t uint64;
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uint64_t uint64;
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uint32_t uint32[sizeof(uint64_t)/2];
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uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)];
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} cycles;
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} cycles;
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cycles.uint64 = value;
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cycles.uint64 = value;
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neorv32_cpu_csr_write(CSR_MCYCLE, 0);
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neorv32_cpu_csr_write(CSR_MCYCLE, 0);
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**************************************************************************/
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**************************************************************************/
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uint64_t neorv32_cpu_get_instret(void) {
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uint64_t neorv32_cpu_get_instret(void) {
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union {
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union {
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uint64_t uint64;
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uint64_t uint64;
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uint32_t uint32[sizeof(uint64_t)/2];
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uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)];
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} cycles;
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} cycles;
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register uint32_t tmp1, tmp2, tmp3;
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register uint32_t tmp1, tmp2, tmp3;
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while(1) {
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while(1) {
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tmp1 = neorv32_cpu_csr_read(CSR_INSTRETH);
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tmp1 = neorv32_cpu_csr_read(CSR_INSTRETH);
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**************************************************************************/
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**************************************************************************/
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void neorv32_cpu_set_minstret(uint64_t value) {
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void neorv32_cpu_set_minstret(uint64_t value) {
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union {
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union {
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uint64_t uint64;
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uint64_t uint64;
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uint32_t uint32[sizeof(uint64_t)/2];
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uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)];
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} cycles;
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} cycles;
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cycles.uint64 = value;
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cycles.uint64 = value;
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neorv32_cpu_csr_write(CSR_MINSTRET, 0);
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neorv32_cpu_csr_write(CSR_MINSTRET, 0);
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**************************************************************************/
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**************************************************************************/
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uint64_t neorv32_cpu_get_systime(void) {
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uint64_t neorv32_cpu_get_systime(void) {
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union {
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union {
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uint64_t uint64;
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uint64_t uint64;
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uint32_t uint32[sizeof(uint64_t)/2];
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uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)];
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} cycles;
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} cycles;
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register uint32_t tmp1, tmp2, tmp3;
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register uint32_t tmp1, tmp2, tmp3;
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while(1) {
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while(1) {
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tmp1 = neorv32_cpu_csr_read(CSR_TIMEH);
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tmp1 = neorv32_cpu_csr_read(CSR_TIMEH);
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