OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_mtime.c] - Diff between revs 51 and 59

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 51 Rev 59
Line 117... Line 117...
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Set compare time register (MTIMECMP) for generating interrupts.
 * Set compare time register (MTIMECMP) for generating interrupts.
 *
 *
 * @note The interrupt is triggered when MTIME >= MTIMECMP.
 * @note The interrupt is triggered when MTIME >= MTIMECMP.
 * @note The interrupt is acknwoledged by writing to the MTIMECMP.HI register.
 * @note Global interrupts and the timer interrupt source have to be enabled .
 * @note The timer interrupt is enabled via neorv32_cpu_mti_enable(void) and disabled via neorv32_cpu_mti_disable(void).
 
 * @note Global interrupts have to be enabled via neorv32_cpu_eint(void).
 
 *
 *
 * @param[in] timecmp System time for interrupt (uint64_t)
 * @param[in] timecmp System time for interrupt (uint64_t)
 **************************************************************************/
 **************************************************************************/
void neorv32_mtime_set_timecmp(uint64_t timecmp) {
void neorv32_mtime_set_timecmp(uint64_t timecmp) {
 
 
  MTIMECMP_LO = -1; // prevent mtimecmp from temporarily becoming smaller than the lesser of the old and new values
  union {
  MTIMECMP = timecmp;
    uint64_t uint64;
 
    uint32_t uint32[sizeof(uint64_t)/2];
 
  } cycles;
 
 
 
  cycles.uint64 = timecmp;
 
 
 
  MTIMECMP_LO = -1; // prevent MTIMECMP from temporarily becoming smaller than the lesser of the old and new values
 
  MTIMECMP_HI = cycles.uint32[1];
 
  MTIMECMP_LO = cycles.uint32[0];
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Get compare time register (MTIMECMP).
 * Get compare time register (MTIMECMP).

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.