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// #################################################################################################
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// #################################################################################################
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// # << NEORV32: neorv32_rte.c - NEORV32 Runtime Environment >> #
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// # << NEORV32: neorv32_rte.c - NEORV32 Runtime Environment >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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neorv32_uart_printf("rv128");
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neorv32_uart_printf("rv128");
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}
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}
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// CPU extensions
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// CPU extensions
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neorv32_uart_printf("\nEndianness: ");
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neorv32_uart_printf("\nEndianness: ");
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if (neorv32_cpu_csr_read(CSR_MSTATUSH) & (1<<CPU_MSTATUSH_MBE)) {
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if (neorv32_cpu_csr_read(CSR_MSTATUSH) & (1<<CSR_MSTATUSH_MBE)) {
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neorv32_uart_printf("big\n");
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neorv32_uart_printf("big\n");
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}
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}
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else {
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else {
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neorv32_uart_printf("little\n");
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neorv32_uart_printf("little\n");
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}
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}
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// CPU extensions
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// CPU extensions
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neorv32_uart_printf("\nExtensions: ");
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neorv32_uart_printf("Extensions: ");
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tmp = neorv32_cpu_csr_read(CSR_MISA);
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tmp = neorv32_cpu_csr_read(CSR_MISA);
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for (i=0; i<26; i++) {
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for (i=0; i<26; i++) {
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if (tmp & (1 << i)) {
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if (tmp & (1 << i)) {
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c = (char)('A' + i);
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c = (char)('A' + i);
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neorv32_uart_putc(c);
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neorv32_uart_putc(c);
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}
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}
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}
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}
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// Z* CPU extensions (from custom "mzext" CSR)
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// Z* CPU extensions (from custom "mzext" CSR)
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tmp = neorv32_cpu_csr_read(CSR_MZEXT);
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tmp = neorv32_cpu_csr_read(CSR_MZEXT);
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if (tmp & (1<<CPU_MZEXT_ZICSR)) {
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if (tmp & (1<<CSR_MZEXT_ZICSR)) {
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neorv32_uart_printf("Zicsr ");
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neorv32_uart_printf("Zicsr ");
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}
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}
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if (tmp & (1<<CPU_MZEXT_ZIFENCEI)) {
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if (tmp & (1<<CSR_MZEXT_ZIFENCEI)) {
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neorv32_uart_printf("Zifencei ");
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neorv32_uart_printf("Zifencei ");
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}
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}
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if (tmp & (1<<CPU_MZEXT_PMP)) {
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neorv32_uart_printf("PMP ");
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}
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// check physical memory protection
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// check physical memory protection
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neorv32_uart_printf("\n\nPhysical memory protection: ");
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neorv32_uart_printf("\nPMP: ");
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if (neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CPU_MZEXT_PMP)) {
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uint32_t pmp_num_regions = neorv32_cpu_pmp_get_num_regions();
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if (pmp_num_regions != 0) {
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// get minimal region siz (granulartiy)
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// get number of available regions
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neorv32_uart_printf("\n- Minimal granularity: %u bytes per region\n", neorv32_cpu_pmp_get_granularity());
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neorv32_uart_printf("\n- Available regions: %u\n", pmp_num_regions);
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// test available modes
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neorv32_uart_printf("- Mode TOR: ");
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neorv32_cpu_csr_write(CSR_PMPCFG0, 0x08);
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if ((neorv32_cpu_csr_read(CSR_PMPCFG0) & 0xFF) == 0x08) {
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neorv32_uart_printf("available\n");
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}
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else {
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neorv32_uart_printf("not implemented\n");
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}
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neorv32_uart_printf("- Mode NA4: ");
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// get minimal region size (granulartiy)
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neorv32_cpu_csr_write(CSR_PMPCFG0, 0x10);
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neorv32_uart_printf("- Minimal granularity: %u bytes per region\n", neorv32_cpu_pmp_get_granularity());
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if ((neorv32_cpu_csr_read(CSR_PMPCFG0) & 0xFF) == 0x10) {
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neorv32_uart_printf("available\n");
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}
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}
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else {
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else {
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neorv32_uart_printf("not implemented\n");
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neorv32_uart_printf("not implemented\n");
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}
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}
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neorv32_uart_printf("- Mode NAPOT: ");
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// check physical memory protection
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neorv32_cpu_csr_write(CSR_PMPCFG0, 0x18);
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neorv32_uart_printf("HPM Counters: %u\n", neorv32_cpu_hpm_get_counters());
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if ((neorv32_cpu_csr_read(CSR_PMPCFG0) & 0xFF) == 0x18) {
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neorv32_uart_printf("available\n");
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}
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else {
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neorv32_uart_printf("not implemented\n");
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}
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// deactivate entry
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neorv32_cpu_csr_write(CSR_PMPCFG0, 0);
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}
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else {
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neorv32_uart_printf("not implemented\n");
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}
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// Misc - system
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// Misc - system
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neorv32_uart_printf("\n\n---- Processor - General ----\n");
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neorv32_uart_printf("\n\n---- Processor - General ----\n");
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neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK);
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neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK);
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM));
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neorv32_uart_printf("IMEM size: %u bytes\n", SYSINFO_IMEM_SIZE);
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neorv32_uart_printf("IMEM size: %u bytes\n", SYSINFO_IMEM_SIZE);
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neorv32_uart_printf("Internal IMEM as ROM: ");
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neorv32_uart_printf("Internal IMEM as ROM: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM_ROM));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM_ROM));
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neorv32_uart_printf("\nData base address: 0x%x\n", SYSINFO_DSPACE_BASE);
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neorv32_uart_printf("Data base address: 0x%x\n", SYSINFO_DSPACE_BASE);
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neorv32_uart_printf("Internal DMEM: ");
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neorv32_uart_printf("Internal DMEM: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_DMEM));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_DMEM));
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neorv32_uart_printf("DMEM size: %u bytes\n", SYSINFO_DMEM_SIZE);
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neorv32_uart_printf("DMEM size: %u bytes\n", SYSINFO_DMEM_SIZE);
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neorv32_uart_printf("\nInternal i-cache: ");
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neorv32_uart_printf("Internal i-cache: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_ICACHE));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_ICACHE));
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_ICACHE)) {
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_ICACHE)) {
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neorv32_uart_printf("- ");
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neorv32_uart_printf("- ");
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uint32_t ic_block_size = (SYSINFO_CACHE >> SYSINFO_CACHE_IC_BLOCK_SIZE_0) & 0x0F;
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uint32_t ic_block_size = (SYSINFO_CACHE >> SYSINFO_CACHE_IC_BLOCK_SIZE_0) & 0x0F;
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else {
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else {
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neorv32_uart_printf("fully-associative\n");
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neorv32_uart_printf("fully-associative\n");
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}
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}
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}
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}
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neorv32_uart_printf("\nBootloader: ");
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neorv32_uart_printf("Bootloader: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_BOOTLOADER));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_BOOTLOADER));
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neorv32_uart_printf("\nExternal memory bus interface: ");
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neorv32_uart_printf("Ext. bus interface: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_EXT));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_EXT));
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neorv32_uart_printf("External memory bus Endianness: ");
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neorv32_uart_printf("Ext. bus Endianness: ");
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_EXT_ENDIAN)) {
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_EXT_ENDIAN)) {
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neorv32_uart_printf("big\n");
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neorv32_uart_printf("big\n");
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}
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}
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else {
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else {
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neorv32_uart_printf("little\n");
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neorv32_uart_printf("little\n");
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/**********************************************************************//**
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/**********************************************************************//**
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* NEORV32 runtime environment: Print project credits
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* NEORV32 runtime environment: Print project credits
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**************************************************************************/
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**************************************************************************/
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void neorv32_rte_print_credits(void) {
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void neorv32_rte_print_credits(void) {
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neorv32_uart_print("The NEORV32 Processor Project by Stephan Nolting\n"
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neorv32_uart_print("The NEORV32 Processor Project\n"
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"Copyright 2021, Stephan Nolting\n"
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"BSD 3-Clause License\n"
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"https://github.com/stnolting/neorv32\n\n");
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"https://github.com/stnolting/neorv32\n\n");
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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Line 568... |
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neorv32_uart_print(
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neorv32_uart_print(
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"\n"
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"\n"
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"BSD 3-Clause License\n"
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"BSD 3-Clause License\n"
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"\n"
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"\n"
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"Copyright (c) 2020, Stephan Nolting. All rights reserved.\n"
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"Copyright (c) 2021, Stephan Nolting. All rights reserved.\n"
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"\n"
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"\n"
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"Redistribution and use in source and binary forms, with or without modification, are\n"
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"Redistribution and use in source and binary forms, with or without modification, are\n"
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"permitted provided that the following conditions are met:\n"
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"permitted provided that the following conditions are met:\n"
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"\n"
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"\n"
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"1. Redistributions of source code must retain the above copyright notice, this list of\n"
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"1. Redistributions of source code must retain the above copyright notice, this list of\n"
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