| Line 46... |
Line 46... |
* The >private< trap vector look-up table of the NEORV32 RTE.
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* The >private< trap vector look-up table of the NEORV32 RTE.
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**************************************************************************/
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**************************************************************************/
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static uint32_t __neorv32_rte_vector_lut[NEORV32_RTE_NUM_TRAPS] __attribute__((unused)); // trap handler vector table
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static uint32_t __neorv32_rte_vector_lut[NEORV32_RTE_NUM_TRAPS] __attribute__((unused)); // trap handler vector table
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// private functions
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// private functions
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static void __attribute__((__interrupt__)) __neorv32_rte_core(void) __attribute__((aligned(16))) __attribute__((unused));
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static void __attribute__((__interrupt__)) __neorv32_rte_core(void) __attribute__((aligned(16)));
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static void __neorv32_rte_debug_exc_handler(void) __attribute__((unused));
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static void __neorv32_rte_debug_exc_handler(void);
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static void __neorv32_rte_print_true_false(int state) __attribute__((unused));
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static void __neorv32_rte_print_true_false(int state);
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static void __neorv32_rte_print_hex_word(uint32_t num);
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static void __neorv32_rte_print_hex_word(uint32_t num);
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|
|
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/**********************************************************************//**
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/**********************************************************************//**
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* Setup NEORV32 runtime environment.
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* Setup NEORV32 runtime environment.
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| Line 160... |
Line 160... |
case TRAP_CODE_L_ACCESS: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_L_ACCESS]; break;
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case TRAP_CODE_L_ACCESS: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_L_ACCESS]; break;
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case TRAP_CODE_S_MISALIGNED: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_S_MISALIGNED]; break;
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case TRAP_CODE_S_MISALIGNED: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_S_MISALIGNED]; break;
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case TRAP_CODE_S_ACCESS: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_S_ACCESS]; break;
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case TRAP_CODE_S_ACCESS: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_S_ACCESS]; break;
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case TRAP_CODE_UENV_CALL: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_UENV_CALL]; break;
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case TRAP_CODE_UENV_CALL: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_UENV_CALL]; break;
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case TRAP_CODE_MENV_CALL: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MENV_CALL]; break;
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case TRAP_CODE_MENV_CALL: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MENV_CALL]; break;
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case TRAP_CODE_NMI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_NMI]; break;
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case TRAP_CODE_MSI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MSI]; break;
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case TRAP_CODE_MSI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MSI]; break;
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case TRAP_CODE_MTI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MTI]; break;
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case TRAP_CODE_MTI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MTI]; break;
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case TRAP_CODE_MEI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MEI]; break;
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case TRAP_CODE_MEI: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_MEI]; break;
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case TRAP_CODE_FIRQ_0: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_FIRQ_0]; break;
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case TRAP_CODE_FIRQ_0: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_FIRQ_0]; break;
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case TRAP_CODE_FIRQ_1: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_FIRQ_1]; break;
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case TRAP_CODE_FIRQ_1: rte_handler = __neorv32_rte_vector_lut[RTE_TRAP_FIRQ_1]; break;
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| Line 275... |
Line 274... |
|
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neorv32_uart_printf("\n\n<<< Processor Configuration Overview >>>\n");
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neorv32_uart_printf("\n\n<<< Processor Configuration Overview >>>\n");
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|
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// Processor - general stuff
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// Processor - general stuff
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neorv32_uart0_printf("\n=== << General >> ===\n"
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neorv32_uart0_printf("\n=== << General >> ===\n"
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"Clock speed: %u Hz\n", SYSINFO_CLK);
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"Clock speed: %u Hz\n", NEORV32_SYSINFO.CLK);
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neorv32_uart0_printf("Full HW reset: "); __neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_HW_RESET));
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neorv32_uart0_printf("Full HW reset: "); __neorv32_rte_print_true_false(NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_HW_RESET));
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neorv32_uart0_printf("Boot Config.: Boot ");
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neorv32_uart0_printf("Boot Config.: Boot ");
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_BOOTLOADER)) {
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_BOOTLOADER)) {
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neorv32_uart0_printf("via Bootloader\n");
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neorv32_uart0_printf("via Bootloader\n");
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}
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}
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else {
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else {
|
neorv32_uart0_printf("from memory (@ 0x%x)\n", SYSINFO_ISPACE_BASE);
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neorv32_uart0_printf("from memory (@ 0x%x)\n", NEORV32_SYSINFO.ISPACE_BASE);
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}
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}
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neorv32_uart0_printf("On-chip debug: "); __neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_OCD));
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neorv32_uart0_printf("On-chip debug: "); __neorv32_rte_print_true_false(NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_OCD));
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// CPU configuration
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// CPU configuration
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neorv32_uart0_printf("\n=== << CPU >> ===\n");
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neorv32_uart0_printf("\n=== << CPU >> ===\n");
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| Line 328... |
Line 327... |
neorv32_uart0_putc(' ');
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neorv32_uart0_putc(' ');
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}
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}
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}
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}
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// Z* CPU extensions
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// Z* CPU extensions
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tmp = SYSINFO_CPU;
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tmp = NEORV32_SYSINFO.CPU;
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if (tmp & (1<<SYSINFO_CPU_ZICSR)) {
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if (tmp & (1<<SYSINFO_CPU_ZICSR)) {
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neorv32_uart0_printf("Zicsr ");
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neorv32_uart0_printf("Zicsr ");
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}
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}
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if (tmp & (1<<SYSINFO_CPU_ZIFENCEI)) {
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if (tmp & (1<<SYSINFO_CPU_ZIFENCEI)) {
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neorv32_uart0_printf("Zifencei ");
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neorv32_uart0_printf("Zifencei ");
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| Line 379... |
Line 378... |
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// Memory configuration
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// Memory configuration
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neorv32_uart0_printf("\n=== << Memory Configuration >> ===\n");
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neorv32_uart0_printf("\n=== << Memory Configuration >> ===\n");
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|
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neorv32_uart0_printf("Instr. base address: 0x%x\n", SYSINFO_ISPACE_BASE);
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neorv32_uart0_printf("Instr. base address: 0x%x\n", NEORV32_SYSINFO.ISPACE_BASE);
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// IMEM
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// IMEM
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neorv32_uart0_printf("Internal IMEM: ");
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neorv32_uart0_printf("Internal IMEM: ");
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM)) {
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_INT_IMEM)) {
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neorv32_uart0_printf("yes, %u bytes\n", SYSINFO_IMEM_SIZE);
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neorv32_uart0_printf("yes, %u bytes\n", NEORV32_SYSINFO.IMEM_SIZE);
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}
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}
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else {
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else {
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neorv32_uart0_printf("no\n");
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neorv32_uart0_printf("no\n");
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}
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}
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// DMEM
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// DMEM
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neorv32_uart0_printf("Data base address: 0x%x\n", SYSINFO_DSPACE_BASE);
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neorv32_uart0_printf("Data base address: 0x%x\n", NEORV32_SYSINFO.DSPACE_BASE);
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neorv32_uart0_printf("Internal DMEM: ");
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neorv32_uart0_printf("Internal DMEM: ");
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_DMEM)) { neorv32_uart0_printf("yes, %u bytes\n", SYSINFO_DMEM_SIZE); }
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_INT_DMEM)) { neorv32_uart0_printf("yes, %u bytes\n", NEORV32_SYSINFO.DMEM_SIZE); }
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else { neorv32_uart0_printf("no\n"); }
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else { neorv32_uart0_printf("no\n"); }
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// i-cache
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// i-cache
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neorv32_uart0_printf("Internal i-cache: ");
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neorv32_uart0_printf("Internal i-cache: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_ICACHE));
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__neorv32_rte_print_true_false(NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_ICACHE));
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_ICACHE)) {
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_ICACHE)) {
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neorv32_uart0_printf("- ");
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neorv32_uart0_printf("- ");
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|
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uint32_t ic_block_size = (SYSINFO_CACHE >> SYSINFO_CACHE_IC_BLOCK_SIZE_0) & 0x0F;
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uint32_t ic_block_size = (NEORV32_SYSINFO.CACHE >> SYSINFO_CACHE_IC_BLOCK_SIZE_0) & 0x0F;
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if (ic_block_size) {
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if (ic_block_size) {
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ic_block_size = 1 << ic_block_size;
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ic_block_size = 1 << ic_block_size;
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}
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}
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else {
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else {
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ic_block_size = 0;
|
ic_block_size = 0;
|
}
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}
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|
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uint32_t ic_num_blocks = (SYSINFO_CACHE >> SYSINFO_CACHE_IC_NUM_BLOCKS_0) & 0x0F;
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uint32_t ic_num_blocks = (NEORV32_SYSINFO.CACHE >> SYSINFO_CACHE_IC_NUM_BLOCKS_0) & 0x0F;
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if (ic_num_blocks) {
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if (ic_num_blocks) {
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ic_num_blocks = 1 << ic_num_blocks;
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ic_num_blocks = 1 << ic_num_blocks;
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}
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}
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else {
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else {
|
ic_num_blocks = 0;
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ic_num_blocks = 0;
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}
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}
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|
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uint32_t ic_associativity = (SYSINFO_CACHE >> SYSINFO_CACHE_IC_ASSOCIATIVITY_0) & 0x0F;
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uint32_t ic_associativity = (NEORV32_SYSINFO.CACHE >> SYSINFO_CACHE_IC_ASSOCIATIVITY_0) & 0x0F;
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ic_associativity = 1 << ic_associativity;
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ic_associativity = 1 << ic_associativity;
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|
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neorv32_uart0_printf("%u bytes: %u set(s), %u block(s) per set, %u bytes per block", ic_associativity*ic_num_blocks*ic_block_size, ic_associativity, ic_num_blocks, ic_block_size);
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neorv32_uart0_printf("%u bytes: %u set(s), %u block(s) per set, %u bytes per block", ic_associativity*ic_num_blocks*ic_block_size, ic_associativity, ic_num_blocks, ic_block_size);
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if (ic_associativity == 1) {
|
if (ic_associativity == 1) {
|
neorv32_uart0_printf(" (direct-mapped)\n");
|
neorv32_uart0_printf(" (direct-mapped)\n");
|
}
|
}
|
else if (((SYSINFO_CACHE >> SYSINFO_CACHE_IC_REPLACEMENT_0) & 0x0F) == 1) {
|
else if (((NEORV32_SYSINFO.CACHE >> SYSINFO_CACHE_IC_REPLACEMENT_0) & 0x0F) == 1) {
|
neorv32_uart0_printf(" (LRU replacement policy)\n");
|
neorv32_uart0_printf(" (LRU replacement policy)\n");
|
}
|
}
|
else {
|
else {
|
neorv32_uart0_printf("\n");
|
neorv32_uart0_printf("\n");
|
}
|
}
|
}
|
}
|
|
|
neorv32_uart0_printf("Ext. bus interface: ");
|
neorv32_uart0_printf("Ext. bus interface: ");
|
__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_EXT));
|
__neorv32_rte_print_true_false(NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_EXT));
|
neorv32_uart0_printf("Ext. bus Endianness: ");
|
neorv32_uart0_printf("Ext. bus Endianness: ");
|
if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_EXT_ENDIAN)) {
|
if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_EXT_ENDIAN)) {
|
neorv32_uart0_printf("big\n");
|
neorv32_uart0_printf("big\n");
|
}
|
}
|
else {
|
else {
|
neorv32_uart0_printf("little\n");
|
neorv32_uart0_printf("little\n");
|
}
|
}
|
|
|
// peripherals
|
// peripherals
|
neorv32_uart0_printf("\n=== << Peripherals >> ===\n");
|
neorv32_uart0_printf("\n=== << Peripherals >> ===\n");
|
|
|
tmp = SYSINFO_FEATURES;
|
tmp = NEORV32_SYSINFO.SOC;
|
neorv32_uart0_printf("GPIO - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_GPIO));
|
neorv32_uart0_printf("GPIO - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_GPIO));
|
neorv32_uart0_printf("MTIME - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_MTIME));
|
neorv32_uart0_printf("MTIME - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_MTIME));
|
neorv32_uart0_printf("UART0 - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_UART0));
|
neorv32_uart0_printf("UART0 - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_UART0));
|
neorv32_uart0_printf("UART1 - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_UART1));
|
neorv32_uart0_printf("UART1 - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_UART1));
|
neorv32_uart0_printf("SPI - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_SPI));
|
neorv32_uart0_printf("SPI - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_SPI));
|
neorv32_uart0_printf("TWI - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_TWI));
|
neorv32_uart0_printf("TWI - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_TWI));
|
neorv32_uart0_printf("PWM - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_PWM));
|
neorv32_uart0_printf("PWM - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_PWM));
|
neorv32_uart0_printf("WDT - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_WDT));
|
neorv32_uart0_printf("WDT - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_WDT));
|
neorv32_uart0_printf("TRNG - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_TRNG));
|
neorv32_uart0_printf("TRNG - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_TRNG));
|
neorv32_uart0_printf("CFS - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFS));
|
neorv32_uart0_printf("CFS - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_CFS));
|
neorv32_uart0_printf("SLINK - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_SLINK));
|
neorv32_uart0_printf("SLINK - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_SLINK));
|
neorv32_uart0_printf("NEOLED - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_NEOLED));
|
neorv32_uart0_printf("NEOLED - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_NEOLED));
|
neorv32_uart0_printf("XIRQ - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_XIRQ));
|
neorv32_uart0_printf("XIRQ - "); __neorv32_rte_print_true_false(tmp & (1 << SYSINFO_SOC_IO_XIRQ));
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* NEORV32 runtime environment: Private function to print yes or no.
|
* NEORV32 runtime environment: Private function to print yes or no.
|
| Line 544... |
Line 543... |
if (neorv32_uart0_available() == 0) {
|
if (neorv32_uart0_available() == 0) {
|
return; // cannot output anything if UART0 is not implemented
|
return; // cannot output anything if UART0 is not implemented
|
}
|
}
|
|
|
neorv32_uart0_print("The NEORV32 RISC-V Processor\n"
|
neorv32_uart0_print("The NEORV32 RISC-V Processor\n"
|
"(c) Stephan Nolting\n"
|
"(c) 2021, Stephan Nolting\n"
|
"BSD 3-Clause License\n"
|
"BSD 3-Clause License\n"
|
"https://github.com/stnolting/neorv32\n\n");
|
"https://github.com/stnolting/neorv32\n\n");
|
}
|
}
|
|
|
|
|
