| Line 136... |
Line 136... |
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// compute return address
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// compute return address
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if (((int32_t)rte_mcause) >= 0) { // modify pc only if not interrupt (MSB cleared)
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if (((int32_t)rte_mcause) >= 0) { // modify pc only if not interrupt (MSB cleared)
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|
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// get low half word of faulting instruction
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// get low half word of faulting instruction
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register uint32_t rte_trap_inst;
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register uint32_t rte_trap_inst = neorv32_cpu_load_unsigned_half(rte_mepc);
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asm volatile ("lh %[result], 0(%[input_i])" : [result] "=r" (rte_trap_inst) : [input_i] "r" (rte_mepc));
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|
|
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if ((rte_trap_inst & 3) == 3) { // faulting instruction is uncompressed instruction
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if ((rte_trap_inst & 3) == 3) { // faulting instruction is uncompressed instruction
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rte_mepc += 4;
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rte_mepc += 4;
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}
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}
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else { // faulting instruction is compressed instruction
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else { // faulting instruction is compressed instruction
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| Line 376... |
Line 375... |
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// check physical memory protection
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// check physical memory protection
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neorv32_uart0_printf("\nPMP: ");
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neorv32_uart0_printf("\nPMP: ");
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uint32_t pmp_num_regions = neorv32_cpu_pmp_get_num_regions();
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uint32_t pmp_num_regions = neorv32_cpu_pmp_get_num_regions();
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if (pmp_num_regions != 0) {
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if (pmp_num_regions != 0) {
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neorv32_uart0_printf("%u regions, %u bytes minimal granularity\n", pmp_num_regions, neorv32_cpu_pmp_get_granularity());
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neorv32_uart0_printf("%u regions, %u bytes minimal granularity, OFF/TOR modes only\n", pmp_num_regions, neorv32_cpu_pmp_get_granularity());
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}
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}
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else {
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else {
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neorv32_uart0_printf("not implemented\n");
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neorv32_uart0_printf("not implemented\n");
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}
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}
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|
|
|
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// Memory configuration
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// Memory configuration
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neorv32_uart0_printf("\n=== << Memory System >> ===\n");
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neorv32_uart0_printf("\n=== << Memory System >> ===\n");
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|
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neorv32_uart0_printf("Boot Config.: Boot ");
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neorv32_uart0_printf("Boot configuration: Boot ");
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_BOOTLOADER)) {
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_BOOTLOADER)) {
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neorv32_uart0_printf("via Bootloader\n");
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neorv32_uart0_printf("via Bootloader\n");
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}
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}
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else {
|
else {
|
neorv32_uart0_printf("from memory (@ 0x%x)\n", NEORV32_SYSINFO.ISPACE_BASE);
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neorv32_uart0_printf("from memory (@ 0x%x)\n", NEORV32_SYSINFO.ISPACE_BASE);
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| Line 456... |
Line 455... |
neorv32_uart0_printf("no\n");
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neorv32_uart0_printf("no\n");
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}
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}
|
|
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neorv32_uart0_printf("Ext. bus interface: ");
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neorv32_uart0_printf("Ext. bus interface: ");
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__neorv32_rte_print_true_false(NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_EXT));
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__neorv32_rte_print_true_false(NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_EXT));
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neorv32_uart0_printf("Ext. bus Endianness: ");
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neorv32_uart0_printf("Ext. bus endianness: ");
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_EXT_ENDIAN)) {
|
if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_MEM_EXT_ENDIAN)) {
|
neorv32_uart0_printf("big\n");
|
neorv32_uart0_printf("big\n");
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}
|
}
|
else {
|
else {
|
neorv32_uart0_printf("little\n");
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neorv32_uart0_printf("little\n");
|
