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/**********************************************************************//**
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/**********************************************************************//**
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* Enable and configure TWI controller. The TWI control register bits are listed in #NEORV32_TWI_CT_enum.
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* Enable and configure TWI controller. The TWI control register bits are listed in #NEORV32_TWI_CT_enum.
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*
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*
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* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] irq_en Enable transfer-done interrupt when 1.
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* @param[in] irq_en Enable transfer-done interrupt when 1.
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* @param[in] ckst_en Enable clock-stretching by peripherals when 1.
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**************************************************************************/
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**************************************************************************/
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void neorv32_twi_setup(uint8_t prsc, uint8_t irq_en) {
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void neorv32_twi_setup(uint8_t prsc, uint8_t irq_en, uint8_t ckst_en) {
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TWI_CT = 0; // reset
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TWI_CT = 0; // reset
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uint32_t ct_enable = 1;
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uint32_t ct_enable = 1;
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ct_enable = ct_enable << TWI_CT_EN;
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ct_enable = ct_enable << TWI_CT_EN;
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ct_prsc = ct_prsc << TWI_CT_PRSC0;
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ct_prsc = ct_prsc << TWI_CT_PRSC0;
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uint32_t ct_irq = (uint32_t)(irq_en & 0x01);
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uint32_t ct_irq = (uint32_t)(irq_en & 0x01);
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ct_irq = ct_irq << TWI_CT_IRQ_EN;
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ct_irq = ct_irq << TWI_CT_IRQ_EN;
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TWI_CT = ct_enable | ct_prsc | ct_irq;
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uint32_t ct_cksten = (uint32_t)(ckst_en & 0x01);
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ct_cksten = ct_cksten << TWI_CT_CKSTEN;
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TWI_CT = ct_enable | ct_prsc | ct_irq | ct_cksten;
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Disable TWI controller.
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* Disable TWI controller.
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