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[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_twi.c] - Diff between revs 64 and 68
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| Rev 64 |
Rev 68 |
| Line 63... |
Line 63... |
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/**********************************************************************//**
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/**********************************************************************//**
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* Enable and configure TWI controller. The TWI control register bits are listed in #NEORV32_TWI_CTRL_enum.
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* Enable and configure TWI controller. The TWI control register bits are listed in #NEORV32_TWI_CTRL_enum.
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*
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*
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* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] ckst_en Enable clock-stretching by peripherals when 1.
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**************************************************************************/
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**************************************************************************/
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void neorv32_twi_setup(uint8_t prsc, uint8_t ckst_en) {
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void neorv32_twi_setup(uint8_t prsc) {
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NEORV32_TWI.CTRL = 0; // reset
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NEORV32_TWI.CTRL = 0; // reset
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uint32_t ct_enable = 1;
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uint32_t ct_enable = 1;
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ct_enable = ct_enable << TWI_CTRL_EN;
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ct_enable = ct_enable << TWI_CTRL_EN;
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uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
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uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
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ct_prsc = ct_prsc << TWI_CTRL_PRSC0;
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ct_prsc = ct_prsc << TWI_CTRL_PRSC0;
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uint32_t ct_cksten = (uint32_t)(ckst_en & 0x01);
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NEORV32_TWI.CTRL = ct_enable | ct_prsc;
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ct_cksten = ct_cksten << TWI_CTRL_CKSTEN;
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NEORV32_TWI.CTRL = ct_enable | ct_prsc | ct_cksten;
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Disable TWI controller.
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* Disable TWI controller.
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