URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_uart.c] - Diff between revs 4 and 12

Rev 4	Rev 12
Line 57...	Line 57...
`*`	`*`
`* @return 0 if UART was not synthesized, 1 if UART is available.`	`* @return 0 if UART was not synthesized, 1 if UART is available.`
`**************************************************************************/`	`**************************************************************************/`
`int neorv32_uart_available(void) {`	`int neorv32_uart_available(void) {`

`if (neorv32_cpu_csr_read(CSR_MFEATURES) & (1 << CPU_MFEATURES_IO_UART)) {`	`if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_UART)) {`
`return 1;`	`return 1;`
`}`	`}`
`else {`	`else {`
`return 0;`	`return 0;`
`}`	`}`
Line 78...	Line 78...
`void neorv32_uart_setup(uint32_t baudrate, uint8_t rx_irq, uint8_t tx_irq) {`	`void neorv32_uart_setup(uint32_t baudrate, uint8_t rx_irq, uint8_t tx_irq) {`

`UART_CT = 0; // reset`	`UART_CT = 0; // reset`

`// raw baud rate prescaler`	`// raw baud rate prescaler`
`uint32_t clock = neorv32_cpu_csr_read(CSR_MCLOCK);`	`uint32_t clock = SYSINFO_CLK;`
`uint16_t i = 0; // BAUD rate divisor`	`uint16_t i = 0; // BAUD rate divisor`
`uint8_t p = 0; // prsc = CLK/2`	`uint8_t p = 0; // prsc = CLK/2`
`while (clock >= 2*baudrate) {`	`while (clock >= 2*baudrate) {`
`clock -= 2*baudrate;`	`clock -= 2*baudrate;`
`i++;`	`i++;`