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Line 62... |
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/**********************************************************************//**
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/**********************************************************************//**
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* Configure and enable watchdog timer. The WDT control register bits are listed in #NEORV32_WDT_CT_enum.
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* Configure and enable watchdog timer. The WDT control register bits are listed in #NEORV32_WDT_CT_enum.
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*
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*
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* @param[in] prsc Clock prescaler to selet timeout interval. See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] prsc Clock prescaler to select timeout interval. See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] mode Trigger system reset on timeout when 1, trigger interrupt on timeout when 0.
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* @param[in] mode Trigger system reset on timeout when 1, trigger interrupt on timeout when 0.
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* @param[in] lock Control register will be locked when 1 (unitl next reset).
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* @param[in] lock Control register will be locked when 1 (until next reset).
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**************************************************************************/
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**************************************************************************/
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void neorv32_wdt_setup(uint8_t prsc, uint8_t mode, uint8_t lock) {
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void neorv32_wdt_setup(uint8_t prsc, uint8_t mode, uint8_t lock) {
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WDT_CT = (1 << WDT_CT_RESET); // reset WDT counter
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WDT_CT = (1 << WDT_CT_RESET); // reset WDT counter
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Line 89... |
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/**********************************************************************//**
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/**********************************************************************//**
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* Disable watchdog timer.
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* Disable watchdog timer.
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*
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*
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* @return Returns 0 if WDT is really deativated, -1 otherwise.
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* @return Returns 0 if WDT is really deactivated, -1 otherwise.
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**************************************************************************/
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**************************************************************************/
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int neorv32_wdt_disable(void) {
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int neorv32_wdt_disable(void) {
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WDT_CT = 0;
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WDT_CT = 0;
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