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Line 44... |
.equ SREG_RESUME_ACK, (1<<2) // -/w: CPU starts resuming
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.equ SREG_RESUME_ACK, (1<<2) // -/w: CPU starts resuming
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.equ SREG_EXECUTE_REQ, (1<<3) // r/-: DM requests to execute program buffer
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.equ SREG_EXECUTE_REQ, (1<<3) // r/-: DM requests to execute program buffer
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.equ SREG_EXECUTE_ACK, (1<<4) // -/w: CPU starts to execute program buffer
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.equ SREG_EXECUTE_ACK, (1<<4) // -/w: CPU starts to execute program buffer
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.equ SREG_EXCEPTION_ACK, (1<<5) // -/w: CPU has detected an exception
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.equ SREG_EXCEPTION_ACK, (1<<5) // -/w: CPU has detected an exception
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.file "debugger.S"
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.file "park_loop.S"
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.section .text
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.section .text
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.balign 4
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.balign 4
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.option norvc
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.option norvc
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.global _start
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.global _start
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.global entry_normal
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.global entry_normal
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.global entry_exception
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.global entry_exception
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_start:
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_start:
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// entry location on ebreak in debug-mode, halt request, or return from single-stepped instruction
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// BASE + 0: entry for ebreak in debug-mode, halt request, or return from single-stepped instruction
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entry_normal:
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entry_normal:
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jal zero, parking_loop_start
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jal zero, parking_loop_start
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// entry location for exceptions - signal EXCEPTION to DM and restart parking loop
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// BASE + 4: entry for exceptions - signal EXCEPTION to DM and restart parking loop
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entry_exception:
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entry_exception:
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csrw dscratch0, s0 // save s0 to dscratch0 so we have a general purpose register available
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csrw dscratch0, s0 // save s0 to dscratch0 so we have a general purpose register available
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addi s0, zero, SREG_EXCEPTION_ACK // mask exception acknowledge flag
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addi s0, zero, SREG_EXCEPTION_ACK // mask exception acknowledge flag
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sw s0, DBMEM_SREG_BASE(zero) // trigger exception acknowledge to inform DM
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sw s0, DBMEM_SREG_BASE(zero) // trigger exception acknowledge to inform DM
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csrr s0, dscratch0 // restore s0 from dscratch0
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csrr s0, dscratch0 // restore s0 from dscratch0
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