URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Show entire file |
Details |
Blame |
View Log
| Rev 61 |
Rev 62 |
| Line 1... |
Line 1... |
/* ################################################################################################# */
|
/* ################################################################################################# */
|
/* # << NEORV32 - debugger.S - Execution-Based On-Chip Debugger - Park Loop Code >> # */
|
/* # << NEORV32 - park_loop.S - Execution-Based On-Chip Debugger - Park Loop Code >> # */
|
/* # ********************************************************************************************* # */
|
/* # ********************************************************************************************* # */
|
/* # BSD 3-Clause License # */
|
/* # BSD 3-Clause License # */
|
/* # # */
|
/* # # */
|
/* # Copyright (c) 2021, Stephan Nolting. All rights reserved. # */
|
/* # Copyright (c) 2021, Stephan Nolting. All rights reserved. # */
|
/* # # */
|
/* # # */
|
| Line 55... |
Line 55... |
.global entry_exception
|
.global entry_exception
|
|
|
|
|
_start:
|
_start:
|
|
|
// BASE + 0: entry for ebreak in debug-mode, halt request, or return from single-stepped instruction
|
// BASE + 0: entry for ebreak in debug-mode, halt request or return from single-stepped instruction
|
entry_normal:
|
entry_normal:
|
jal zero, parking_loop_start
|
jal zero, parking_loop_start
|
|
|
// BASE + 4: entry for exceptions - signal EXCEPTION to DM and restart parking loop
|
// BASE + 4: entry for exceptions - signal EXCEPTION to DM and restart parking loop
|
entry_exception:
|
entry_exception:
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.