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URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [svd/] [neorv32.svd] - Diff between revs 69 and 70

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Rev 69 Rev 70
Line 342... Line 342...
          0x3C
          0x3C
        
        
      
      
    
    
 
 
 
    
 
    
 
      XIP
 
      Execute In Place Module
 
      CIP
 
      0xFFFFFF40
 
 
 
      
 
        0
 
        0x10
 
        registers
 
      
 
 
 
      
 
        
 
          CTRL
 
          Control register
 
          0x00
 
          
 
            
 
              XIP_CTRL_EN
 
              [0:0]
 
              XIP module enable flag
 
            
 
            
 
              XIP_CTRL_PRSC
 
              [3:1]
 
              SPI clock prescaler select
 
            
 
            
 
              XIP_CTRL_CPOL
 
              [4:4]
 
              SPI clock (idle) polarity
 
            
 
            
 
              XIP_CTRL_CPHA
 
              [5:5]
 
              SPI clock phase
 
            
 
            
 
              XIP_CTRL_SPI_NBYTES
 
              [9:6]
 
              Number of bytes in SPI transmission
 
            
 
            
 
              XIP_CTRL_XIP_EN
 
              [10:10]
 
              XIP mode enable
 
            
 
            
 
              XIP_CTRL_XIP_ABYTES
 
              [12:11]
 
              Number of XIP address bytes (minus 1)
 
            
 
            
 
              XIP_CTRL_RD_CMD
 
              [20:13]
 
              SPI flash read command
 
            
 
            
 
              XIP_CTRL_XIP_PAGE
 
              [24:21]
 
              XIP memory page
 
            
 
            
 
              XIP_CTRL_SPI_CSEN
 
              [25:25]
 
              SPI chip-select enable
 
            
 
            
 
              XIP_CTRL_HIGHSPEED
 
              [26:26]
 
              SPI high-speed mode enable (ignoring XIP_CTRL_PRSC)
 
            
 
            
 
              XIP_CTRL_PHY_BUSY
 
              [30:30]
 
              read-only
 
              SPI PHY busy
 
            
 
            
 
              XIP_CTRL_XIP_BUSY
 
              [31:31]
 
              read-only
 
              XIP access in progress
 
            
 
          
 
        
 
        
 
          DATA_LO
 
          Direct SPI access - data register low
 
          0x08
 
        
 
        
 
          DATA_HI
 
          Direct SPI access - data register high
 
          0x0C
 
        
 
      
 
    
 
 
    
    
    
    
      GPTMR
      GPTMR
      General purpose timer
      General purpose timer
      GPTMR
      GPTMR
Line 419... Line 520...
              [0:0]
              [0:0]
              read-only
              read-only
              Bus error type: 0=device error, 1=access timeout
              Bus error type: 0=device error, 1=access timeout
            
            
            
            
 
              BUSKEEPER_NULL_CHECK_EN
 
              [16:16]
 
              Enable NULL address check when set
 
            
 
            
              BUSKEEPER_ERR_FLAG
              BUSKEEPER_ERR_FLAG
              [31:31]
              [31:31]
              Sticky error flag, clears after read or write access
              Sticky error flag, clears after read or write access
            
            
          
          
Line 730... Line 836...
              SPI_CTRL_CPOL
              SPI_CTRL_CPOL
              [15:15]
              [15:15]
              Clock polarity
              Clock polarity
            
            
            
            
 
              SPI_CTRL_HIGHSPEED
 
              [16:16]
 
              SPI high-speed mode enable (ignoring SPI_CTRL_PRSC)
 
            
 
            
              SPI_CTRL_BUSY
              SPI_CTRL_BUSY
              [31:31]
              [31:31]
              read-only
              read-only
              SPI busy flag
              SPI busy flag
            
            
Line 1142... Line 1253...
            SYSINFO_SOC_IO_SLINK[25:25]Stream link interface implemented
            SYSINFO_SOC_IO_SLINK[25:25]Stream link interface implemented
            SYSINFO_SOC_IO_UART1[26:26]Secondary universal asynchronous receiver/transmitter 1 implemented
            SYSINFO_SOC_IO_UART1[26:26]Secondary universal asynchronous receiver/transmitter 1 implemented
            SYSINFO_SOC_IO_NEOLED[27:27]NeoPixel-compatible smart LED interface implemented
            SYSINFO_SOC_IO_NEOLED[27:27]NeoPixel-compatible smart LED interface implemented
            SYSINFO_SOC_IO_XIRQ[28:28]External interrupt controller implemented
            SYSINFO_SOC_IO_XIRQ[28:28]External interrupt controller implemented
            SYSINFO_SOC_IO_GPTMR[29:29]General purpose timer implemented
            SYSINFO_SOC_IO_GPTMR[29:29]General purpose timer implemented
 
            SYSINFO_SOC_IO_XIP[30:30]Execute in place module implemented
          
          
        
        
        
        
          CACHE
          CACHE
          Cache configuration
          Cache configuration

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