| Line 87... |
Line 87... |
input [3:0]FLAGOP,
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input [3:0]FLAGOP,
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input WORD,
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input WORD,
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input INC2,
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input INC2,
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output reg [15:0]FOUT,
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output reg [15:0]FOUT,
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output reg [15:0]ALUOUT,
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output reg [15:0]ALUOUT,
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output [15:0]ALUOUTA,
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output reg ALUCONT,
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output reg ALUCONT,
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output NULLSHIFT,
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output NULLSHIFT,
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output COUT,
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output COUT,
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input [2:0]STAGE,
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input [2:0]STAGE,
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input CLK
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input CLK
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| Line 117... |
Line 118... |
// ADDER
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// ADDER
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assign {AF, SUMOUT[3:0]} = SUMOP1[3:0] + SUMOP2[3:0] + SCIN;
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assign {AF, SUMOUT[3:0]} = SUMOP1[3:0] + SUMOP2[3:0] + SCIN;
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assign {SC8OUT, SUMOUT[7:4]} = SUMOP1[7:4] + SUMOP2[7:4] + AF;
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assign {SC8OUT, SUMOUT[7:4]} = SUMOP1[7:4] + SUMOP2[7:4] + AF;
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assign {SC16OUT, SUMOUT[15:8]} = SUMOP1[15:8] + SUMOP2[15:8] + SC8OUT;
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assign {SC16OUT, SUMOUT[15:8]} = SUMOP1[15:8] + SUMOP2[15:8] + SC8OUT;
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assign COUT = (WORD ? SC16OUT : SC8OUT) ^ CPLOP2;
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assign COUT = (WORD ? SC16OUT : SC8OUT) ^ CPLOP2;
|
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assign ALUOUTA = ALUOP == 5'b11111 ? RB : SUMOUT;
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|
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// SHIFTER
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// SHIFTER
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reg [4:0]SHNOPT; // optimized shift
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reg [4:0]SHNOPT; // optimized shift
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wire [4:0]SHN = {STAGE[2:1] ^ SHNOPT[4:3], SHNOPT[2:0]};
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wire [4:0]SHN = {STAGE[2:1] ^ SHNOPT[4:3], SHNOPT[2:0]};
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assign NULLSHIFT = ~|SHNOPT;
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assign NULLSHIFT = ~|SHNOPT;
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| Line 289... |
Line 291... |
// 1010 - BX+AL
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// 1010 - BX+AL
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// 1011 - TMP16+2
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// 1011 - TMP16+2
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// 1100 -
|
// 1100 -
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// 1101 - SP+2+DISP
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// 1101 - SP+2+DISP
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// 1110 - DISP[7:0]<<2
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// 1110 - DISP[7:0]<<2
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// 1111 - PIO
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// 1111 -
|
module Next186_EA(
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module Next186_EA(
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input [15:0] SP,
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input [15:0] SP,
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input [15:0] BX,
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input [15:0] BX,
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input [15:0] BP,
|
input [15:0] BP,
|
input [15:0] SI,
|
input [15:0] SI,
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input [15:0] DI,
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input [15:0] DI,
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input [15:0] PIO,
|
|
input [15:0] TMP16,
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input [15:0] TMP16,
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input [7:0] AL,
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input [7:0] AL,
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input [15:0] AIMM,
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input [15:0] AIMM,
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input [3:0]EAC,
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input [3:0]EAC,
|
output [15:0] ADDR16
|
output [15:0] ADDR16
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| Line 327... |
Line 328... |
case(EAC)
|
case(EAC)
|
4'b1000: OP3 = 16'hfffe; // SP - 2
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4'b1000: OP3 = 16'hfffe; // SP - 2
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4'b1010: OP3 = {8'b00000000, AL}; // XLAT
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4'b1010: OP3 = {8'b00000000, AL}; // XLAT
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4'b1001, 4'b1011: OP3 = 16'h0000; // SP/TMP16 + 2
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4'b1001, 4'b1011: OP3 = 16'h0000; // SP/TMP16 + 2
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4'b1110: OP3 = {6'b000000, AIMM[7:0], 2'b00}; // int
|
4'b1110: OP3 = {6'b000000, AIMM[7:0], 2'b00}; // int
|
4'b1111: OP3 = PIO; // in,out
|
|
default: OP3 = AIMM;
|
default: OP3 = AIMM;
|
endcase
|
endcase
|
end
|
end
|
|
|
assign ADDR16 = OP1 + OP2 + OP3;
|
assign ADDR16 = OP1 + OP2 + OP3;
|
