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https://opencores.org/ocsvn/next186/next186/trunk
[/] [next186/] [trunk/] [Next186_Regs.v] - Diff between revs 2 and 20
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Rev 20 |
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Line 130... |
5: REG_BSEL = BP;
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5: REG_BSEL = BP;
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6: REG_BSEL = SI;
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6: REG_BSEL = SI;
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7: REG_BSEL = DI;
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7: REG_BSEL = DI;
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endcase
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endcase
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end
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end
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/*
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BUFG BUFG_inst (
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.O(CLKD), // Clock buffer output
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.I(CLK) // Clock buffer input
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);
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*/
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always @(posedge CLK)
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always @(posedge CLK)
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if(CLKEN) begin
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if(CLKEN) begin
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if(WE[0] && ASEL == 0) AX[7:0] <= FDRW[7:0];
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if(WE[0] && ASEL == 0) AX[7:0] <= FDRW[7:0];
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else if(DIVOP) AX[7:0] <= {AX[6:0], DIVC ^ DIVSGN};
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else if(DIVOP) AX[7:0] <= {AX[6:0], DIVC ^ DIVSGN};
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