URL
https://opencores.org/ocsvn/nysa_sata/nysa_sata/trunk
[/] [nysa_sata/] [trunk/] [README.md] - Diff between revs 3 and 5
Show entire file |
Details |
Blame |
View Log
| Rev 3 |
Rev 5 |
| Line 1... |
Line 1... |
nysa-sata-stack
|
nysa-sata-stack
|
===============
|
===============
|
|
|
Sata stack written in Verilog
|
Sata stack written in Verilog
|
|
|
Staus: TLDR Version: Simulations are working
|
Staus: TLDR Version: Demonstrated reading and writing to a hard drive on a Spartan 6 LX45T board
|
|
|
|
For a reference implementation here is a wishbone slave core used to verify the functionality of the SATA Stack:
|
|
|
|
https://github.com/CospanDesign/nysa-verilog/tree/master/verilog/wishbone/slave/wb_sata
|
|
|
|
More documentation can be found on the [wiki](https://github.com/CospanDesign/nysa-sata/wiki)
|
|
|
This code was written a long time ago and I've learned much more about verilog and project organization
|
|
since then. It has been proven in a Virtex 6 FPGA reading and writing to/from four Sata 2 hard drives at
|
|
Most of the license is MIT but some of the licenses are GPL
|
Most of the license is MIT but some of the licenses are GPL
|
|
|
TODO: Fix Link layer... there is a small FIFO in there that is used to handle all starting and stopping
|
TODO: Fix Link layer... there is a small FIFO in there that is used to handle all starting and stopping
|
of the read, it's a work around and needs to be fixed
|
of the read, it's a work around and needs to be fixed
|
|
|
TODO: Fix Link layer so that it only instantiates one instance of the scrambler, not two
|
TODO: Fix Link layer so that it only instantiates one instance of the scrambler, not two
|
|
|
Code Organization:
|
Code Organization:
|
|
|
rtl/
|
rtl/
|
| Line 55... |
Line 58... |
|
|
Although I believe this code should be distributed for free and people should redistribute their software
|
Although I believe this code should be distributed for free and people should redistribute their software
|
I leave the ethics up to the user and have licensesed most of the code as MIT but I did use some GPL cores
|
I leave the ethics up to the user and have licensesed most of the code as MIT but I did use some GPL cores
|
and if the user desires to use this in their closed source project be warned about the GPL'ed modules in
|
and if the user desires to use this in their closed source project be warned about the GPL'ed modules in
|
this stack.
|
this stack.
|
|
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.