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[/] [nysa_sata/] [trunk/] [test/] [Makefile] - Diff between revs 2 and 3
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Rev 3 |
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Line 37... |
VERILOG_SOURCES += $(TOPDIR)/sim/faux_sata_hd_command_layer.v
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VERILOG_SOURCES += $(TOPDIR)/sim/faux_sata_hd_command_layer.v
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VERILOG_SOURCES += $(TOPDIR)/sim/faux_sata_hd.v
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VERILOG_SOURCES += $(TOPDIR)/sim/faux_sata_hd.v
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VERILOG_SOURCES += $(TOPDIR)/sim/tb_cocotb.v
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VERILOG_SOURCES += $(TOPDIR)/sim/tb_cocotb.v
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TOPLEVEL = tb_cocotb
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TOPLEVEL = tb_cocotb
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GPI_IMPL := vpi
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GPI_IMPL := vpi
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export TOPLEVEL_LANG
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export TOPLEVEL_LANG
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