Line 11... |
Line 11... |
input [15:0] address;
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input [15:0] address;
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output [31:0] read_data;
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output [31:0] read_data;
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begin
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begin
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@(posedge app_clk);
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@(posedge app_clk);
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reg_id = block_id;
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reg_id = block_id;
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// Byte-0
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reg_cs = 1;
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reg_cs = 1;
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reg_wr = 0;
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reg_wr = 0;
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reg_be = 4'hF;
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reg_be = 1'h1;
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reg_addr = address;
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reg_addr = address;
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@(posedge reg_ack);
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@(posedge reg_ack);
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#1 read_data = reg_rdata;
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#1 read_data[7:0] = reg_rdata[7:0];
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@(posedge app_clk);
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reg_cs = 0;
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// Byte-1
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reg_cs = 1;
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reg_wr = 0;
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reg_be = 1'h1;
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reg_addr = address+1;
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@(posedge reg_ack);
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#1 read_data[15:8]= reg_rdata[7:0];
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@(posedge app_clk);
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reg_cs = 0;
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// Byte-2
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reg_cs = 1;
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reg_wr = 0;
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reg_be = 1'h1;
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reg_addr = address+2;
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@(posedge reg_ack);
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#1 read_data[23:16]= reg_rdata[7:0];
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@(posedge app_clk);
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reg_cs = 0;
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// Byte-3
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reg_cs = 1;
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reg_wr = 0;
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reg_be = 1'h1;
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reg_addr = address+3;
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@(posedge reg_ack);
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#1 read_data[31:24] = reg_rdata[7:0];
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@(posedge app_clk);
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@(posedge app_clk);
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reg_cs = 0;
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reg_cs = 0;
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//$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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//$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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end
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end
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endtask
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endtask
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Line 29... |
Line 61... |
input [3:0] block_id; // 0/1/2 --> ram/spi/uart
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input [3:0] block_id; // 0/1/2 --> ram/spi/uart
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input [15:0] address;
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input [15:0] address;
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input [31:0] write_data;
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input [31:0] write_data;
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begin
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begin
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$display ("Config-Write: Id: %h Addr = %h, Cfg. Data = %h", block_id,address, write_data);
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$display ("Config-Write: Id: %h Addr = %h, Cfg. Data = %h", block_id,address, write_data);
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// Byte-0
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@(posedge app_clk);
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reg_id = block_id;
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reg_cs = 1;
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reg_wr = 1;
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reg_be = 1'h1;
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reg_addr = address;
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reg_wdata = write_data[7:0];
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@(posedge reg_ack);
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@(posedge app_clk);
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reg_cs = 0;
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reg_wr = 0;
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// Byte-1
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@(posedge app_clk);
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reg_id = block_id;
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reg_cs = 1;
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reg_wr = 1;
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reg_be = 1'h1;
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reg_addr = address+1;
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reg_wdata = write_data[15:8];
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@(posedge reg_ack);
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@(posedge app_clk);
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reg_cs = 0;
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reg_wr = 0;
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// Byte-2
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@(posedge app_clk);
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reg_id = block_id;
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reg_cs = 1;
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reg_wr = 1;
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reg_be = 1'h1;
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reg_addr = address+2;
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reg_wdata = write_data[23:16];
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@(posedge reg_ack);
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@(posedge app_clk);
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reg_cs = 0;
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reg_wr = 0;
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// Byte-2
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@(posedge app_clk);
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reg_id = block_id;
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reg_cs = 1;
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reg_wr = 1;
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reg_be = 1'h1;
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reg_addr = address+3;
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reg_wdata = write_data[31:24];
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@(posedge reg_ack);
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@(posedge app_clk);
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reg_cs = 0;
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reg_wr = 0;
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end
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endtask
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task cpu_byte_read;
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input [3:0] block_id;
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input [15:0] address;
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output [7:0] read_data;
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begin
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@(posedge app_clk);
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reg_id = block_id;
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// Byte-0
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reg_cs = 1;
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reg_wr = 0;
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reg_be = 1'h1;
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reg_addr = address;
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@(posedge reg_ack);
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#1 read_data[7:0] = reg_rdata[7:0];
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@(posedge app_clk);
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reg_cs = 0;
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//$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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end
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endtask
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task cpu_byte_write;
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input [3:0] block_id; // 0/1/2 --> ram/spi/uart
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input [15:0] address;
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input [7:0] write_data;
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begin
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$display ("Config-Write: Id: %h Addr = %h, Cfg. Data = %h", block_id,address, write_data);
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// Byte-0
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@(posedge app_clk);
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@(posedge app_clk);
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reg_id = block_id;
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reg_id = block_id;
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reg_cs = 1;
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reg_cs = 1;
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reg_wr = 1;
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reg_wr = 1;
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reg_be = 4'hF;
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reg_be = 1'h1;
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reg_addr = address;
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reg_addr = address;
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reg_wdata = write_data;
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reg_wdata = write_data[7:0];
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@(posedge reg_ack);
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@(posedge reg_ack);
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@(posedge app_clk);
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@(posedge app_clk);
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reg_cs = 0;
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reg_cs = 0;
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reg_wr = 0;
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reg_wr = 0;
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end
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end
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endtask
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endtask
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No newline at end of file
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No newline at end of file
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