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https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
[/] [oms8051mini/] [trunk/] [verif/] [tb/] [tb_tasks.v] - Diff between revs 11 and 29
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| Rev 11 |
Rev 29 |
| Line 134... |
Line 134... |
@(posedge reg_ack);
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@(posedge reg_ack);
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#1 read_data[7:0] = reg_rdata[7:0];
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#1 read_data[7:0] = reg_rdata[7:0];
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@(posedge app_clk);
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@(posedge app_clk);
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reg_cs = 0;
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reg_cs = 0;
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//$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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end
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end
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endtask
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endtask
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task cpu_byte_read_cmp;
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input [3:0] block_id;
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input [15:0] address;
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input [7:0] exp_read_data;
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reg [7:0] read_data;
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begin
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@(posedge app_clk);
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reg_id = block_id;
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// Byte-0
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reg_cs = 1;
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reg_wr = 0;
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reg_be = 1'h1;
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reg_addr = address;
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@(posedge reg_ack);
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#1 read_data[7:0] = reg_rdata[7:0];
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@(posedge app_clk);
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reg_cs = 0;
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if(read_data !== exp_read_data) begin
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$display ("ERROR: REG READ : Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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`TB_GLBL.test_err;
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end else
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$display ("Config-Read: Id: %h Addr = %h, Data = %h", block_id,address, read_data);
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end
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endtask
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task cpu_byte_write;
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task cpu_byte_write;
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input [3:0] block_id; // 0/1/2 --> ram/spi/uart
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input [3:0] block_id; // 0/1/2 --> ram/spi/uart
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input [15:0] address;
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input [15:0] address;
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input [7:0] write_data;
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input [7:0] write_data;
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begin
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begin
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