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-- Component declaration
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-- Component declaration
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-- (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)
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-- (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)
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component o8_cpu is
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component o8_cpu is
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generic(
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generic(
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Program_Start_Addr : ADDRESS_TYPE := x"8000";
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Program_Start_Addr : ADDRESS_TYPE := x"8000"; -- Initial PC location
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ISR_Start_Addr : ADDRESS_TYPE := x"FFF0";
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ISR_Start_Addr : ADDRESS_TYPE := x"FFF0"; -- Bottom of ISR vec's
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Stack_Start_Addr : ADDRESS_TYPE := x"03FF";
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Stack_Start_Addr : ADDRESS_TYPE := x"03FF"; -- Top of Stack
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Allow_Stack_Address_Move : boolean := false;
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Allow_Stack_Address_Move : boolean := false; -- Use Normal v8 RSP
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Enable_Auto_Increment : boolean := false;
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Enable_Auto_Increment : boolean := false; -- Modify indexed instr
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BRK_Implements_WAI : boolean := false;
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BRK_Implements_WAI : boolean := false; -- BRK -> Wait for Int
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Enable_NMI : boolean := true;
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Enable_NMI : boolean := false; -- Force INTR0 enabled
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RTI_Ignores_GP_Flags : boolean := false;
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Sequential_Interrupts : boolean := false; -- Interruptable ISRs
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Default_Interrupt_Mask : DATA_TYPE := x"FF";
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RTI_Ignores_GP_Flags : boolean := false; -- RTI sets all flags
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Clock_Frequency : real
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Supervisor_Mode : boolean := false; -- I bit is restricted
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Unsigned_Index_Offsets : boolean := false; -- Offsets are signed
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Rotate_Ignores_Carry : boolean := false; -- Rotate thru Carry
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Default_Interrupt_Mask : DATA_TYPE := x"FF"; -- Enable all Ints
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Clock_Frequency : real -- Clock Frequency
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);
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);
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port(
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port(
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Clock : in std_logic;
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Clock : in std_logic;
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PLL_Locked : in std_logic;
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PLL_Locked : in std_logic;
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Halt_Req : in std_logic := '0';
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Halt_Req : in std_logic := '0';
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