| Line 29... |
Line 29... |
use ieee.std_logic_1164.all;
|
use ieee.std_logic_1164.all;
|
use ieee.std_logic_unsigned.all;
|
use ieee.std_logic_unsigned.all;
|
use ieee.std_logic_arith.all;
|
use ieee.std_logic_arith.all;
|
use ieee.std_logic_misc.all;
|
use ieee.std_logic_misc.all;
|
|
|
library work;
|
|
use work.open8_pkg.all;
|
|
|
|
entity async_ser_rx is
|
entity async_ser_rx is
|
generic(
|
generic(
|
Reset_Level : std_logic;
|
Reset_Level : std_logic;
|
Enable_Parity : boolean;
|
Enable_Parity : boolean;
|
Parity_Odd_Even_n : std_logic;
|
Parity_Odd_Even_n : std_logic;
|
| Line 75... |
Line 72... |
constant HALF_PERIOD : std_logic_vector(Baud_Bits - 1 downto 0) :=
|
constant HALF_PERIOD : std_logic_vector(Baud_Bits - 1 downto 0) :=
|
conv_std_logic_vector(Half_Per_i, Baud_Bits);
|
conv_std_logic_vector(Half_Per_i, Baud_Bits);
|
constant FULL_PERIOD : std_logic_vector(Baud_Bits - 1 downto 0) :=
|
constant FULL_PERIOD : std_logic_vector(Baud_Bits - 1 downto 0) :=
|
conv_std_logic_vector(Full_Per_i, Baud_Bits);
|
conv_std_logic_vector(Full_Per_i, Baud_Bits);
|
|
|
signal Rx_Baud_Cntr : std_logic_vector(Baud_Bits - 1 downto 0);
|
signal Rx_Baud_Cntr : std_logic_vector(Baud_Bits - 1 downto 0) :=
|
|
(others => '0');
|
|
|
signal Rx_In_SR : std_logic_vector(3 downto 0);
|
signal Rx_In_SR : std_logic_vector(3 downto 0) := x"0";
|
alias Rx_In_Q is Rx_In_SR(3);
|
alias Rx_In_Q is Rx_In_SR(3);
|
|
|
signal Rx_Buffer : std_logic_vector(7 downto 0);
|
signal Rx_Buffer : std_logic_vector(7 downto 0) := x"00";
|
signal Rx_Parity : std_logic;
|
signal Rx_Parity : std_logic := '0';
|
signal Rx_PErr_int : std_logic;
|
signal Rx_PErr_int : std_logic := '0';
|
|
|
signal Rx_State : std_logic_vector(3 downto 0);
|
signal Rx_State : std_logic_vector(3 downto 0) := x"0";
|
alias Rx_Bit_Sel is Rx_State(2 downto 0);
|
alias Rx_Bit_Sel is Rx_State(2 downto 0);
|
|
|
-- State machine definitions
|
-- State machine definitions
|
constant IO_RSV0 : std_logic_vector(3 downto 0) := "1011"; -- B
|
constant IO_RSV0 : std_logic_vector(3 downto 0) := "1011"; -- B
|
constant IO_RSV1 : std_logic_vector(3 downto 0) := "1100"; -- C
|
constant IO_RSV1 : std_logic_vector(3 downto 0) := "1100"; -- C
|
