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[/] [open8_urisc/] [trunk/] [VHDL/] [async_ser_rx.vhd] - Diff between revs 294 and 295

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Rev 294 Rev 295
Line 33... Line 33...
--
--
-- Revision History
-- Revision History
-- Author          Date     Change
-- Author          Date     Change
------------------ -------- ---------------------------------------------------
------------------ -------- ---------------------------------------------------
-- Seth Henry      04/14/20 Code cleanup and revision section added
-- Seth Henry      04/14/20 Code cleanup and revision section added
-- Seth Henry      09/13/21 Fixed inverted parity bit
 
 
 
library ieee;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
Line 142... Line 141...
            Rx_State         <= Rx_State + 1;
            Rx_State         <= Rx_State + 1;
          end if;
          end if;
 
 
        when IO_IDLE =>
        when IO_IDLE =>
          Rx_Baud_Cntr       <= HALF_PERIOD;
          Rx_Baud_Cntr       <= HALF_PERIOD;
          Rx_Parity          <= not Parity_Odd_Even_n;
          Rx_Parity          <= Parity_Odd_Even_n;
          if( Rx_In_Q = '0' )then
          if( Rx_In_Q = '0' )then
            Rx_State         <= Rx_State + 1;
            Rx_State         <= Rx_State + 1;
          end if;
          end if;
 
 
        when IO_SYNC =>
        when IO_SYNC =>

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