OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [button_db.vhd] - Diff between revs 218 and 261

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 218 Rev 261
Line 55... Line 55...
architecture behave of button_db is
architecture behave of button_db is
 
 
  signal Button_SR      : std_logic_vector(2 downto 0);
  signal Button_SR      : std_logic_vector(2 downto 0);
  alias  Button_In_q    is Button_SR(2);
  alias  Button_In_q    is Button_SR(2);
 
 
  signal Button_Dn_Tmr  : std_logic_vector(5 downto 0);
  signal Button_Dn_Tmr  : std_logic_vector(6 downto 0);
  signal Button_Dn      : std_logic;
  signal Button_Dn      : std_logic;
 
 
  signal Button_Up_Tmr  : std_logic_vector(5 downto 0);
  signal Button_Up_Tmr  : std_logic_vector(6 downto 0);
  signal Button_Up      : std_logic;
  signal Button_Up      : std_logic;
 
 
  signal Button_State   : std_logic;
  signal Button_State   : std_logic;
  signal Button_State_q : std_logic;
  signal Button_State_q : std_logic;
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.