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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_7seg.vhd] - Diff between revs 257 and 284

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Rev 257 Rev 284
Line 19... Line 19...
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--
--
-- VHDL Units :  o8_register
-- VHDL Units :  o8_7seg
-- Description:  Provides a single addressible 8-bit output register
-- Description:  Drives up to two 7-segment displays in either common cathode
 
--            :   or common anode mode with per-display PWM brightness.
--
--
-- Register Map:
-- Register Map:
-- Offset  Bitfield Description                        Read/Write
-- Offset  Bitfield Description                        Read/Write
--   0x00  ---AAAAA Display 1 value                       (RW)
--   0x00  ---AAAAA Display 1 value                       (RW)
--   0x01  ---AAAAA Display 2 value                       (RW)
--   0x01  ---AAAAA Display 2 value                       (RW)

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