| Line 172... |
Line 172... |
);
|
);
|
port(
|
port(
|
Clock : in std_logic;
|
Clock : in std_logic;
|
Reset : in std_logic;
|
Reset : in std_logic;
|
--
|
--
|
Bus_Address : in ADDRESS_TYPE;
|
Open8_Bus : in OPEN8_BUS_TYPE;
|
Wr_Enable : in std_logic;
|
|
Wr_Data : in DATA_TYPE;
|
|
Rd_Enable : in std_logic;
|
|
Rd_Data : out DATA_TYPE;
|
Rd_Data : out DATA_TYPE;
|
Interrupt : out std_logic
|
Interrupt : out std_logic
|
);
|
);
|
end entity;
|
end entity;
|
|
|
| Line 244... |
Line 241... |
constant OP_BROR : std_logic_vector(4 downto 0) := "11111";
|
constant OP_BROR : std_logic_vector(4 downto 0) := "11111";
|
-------------------------------------------------------------------
|
-------------------------------------------------------------------
|
|
|
constant User_Addr : std_logic_vector(15 downto 5):=
|
constant User_Addr : std_logic_vector(15 downto 5):=
|
Address(15 downto 5);
|
Address(15 downto 5);
|
alias Comp_Addr is Bus_Address(15 downto 5);
|
alias Comp_Addr is Open8_Bus.Address(15 downto 5);
|
|
|
signal Reg_Addr : std_logic_vector(4 downto 0) :=
|
signal Reg_Addr : std_logic_vector(4 downto 0) :=
|
(others => '0');
|
(others => '0');
|
|
|
signal Addr_Match : std_logic := '0';
|
signal Addr_Match : std_logic := '0';
|
| Line 439... |
Line 436... |
-- For convenience, convert these to integers and assign them to
|
-- For convenience, convert these to integers and assign them to
|
-- variables
|
-- variables
|
Reg_Sel := conv_integer(Reg_Addr(3 downto 1));
|
Reg_Sel := conv_integer(Reg_Addr(3 downto 1));
|
Oper_Sel := conv_integer(Operand_Sel);
|
Oper_Sel := conv_integer(Operand_Sel);
|
|
|
Wr_En <= Addr_Match and Wr_Enable;
|
Wr_En <= Addr_Match and Open8_Bus.Wr_En;
|
Wr_Data_q <= Wr_Data;
|
Wr_Data_q <= Open8_Bus.Wr_Data;
|
Reg_Addr <= Bus_Address(4 downto 0);
|
Reg_Addr <= Open8_Bus.Address(4 downto 0);
|
|
|
Start <= '0';
|
Start <= '0';
|
if( Wr_En = '1' )then
|
if( Wr_En = '1' )then
|
case( Reg_Addr )is
|
case( Reg_Addr )is
|
-- Even addresses go to the lower byte of the register
|
-- Even addresses go to the lower byte of the register
|
| Line 474... |
Line 471... |
when others => null;
|
when others => null;
|
end case;
|
end case;
|
end if;
|
end if;
|
|
|
Rd_Data <= OPEN8_NULLBUS;
|
Rd_Data <= OPEN8_NULLBUS;
|
Rd_En <= Addr_Match and Rd_Enable;
|
Rd_En <= Addr_Match and Open8_Bus.Rd_En;
|
|
|
if( Rd_En = '1' )then
|
if( Rd_En = '1' )then
|
case( Reg_Addr )is
|
case( Reg_Addr )is
|
when "00000" | "00010" | "00100" | "00110" |
|
when "00000" | "00010" | "00100" | "00110" |
|
"01000" | "01010" | "01100" | "01110" =>
|
"01000" | "01010" | "01100" | "01110" =>
|
