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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_btn_int.vhd] - Diff between revs 223 and 224

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Rev 223 Rev 224
Line 31... Line 31...
--
--
-- Revision History
-- Revision History
-- Author          Date     Change
-- Author          Date     Change
------------------ -------- ---------------------------------------------------
------------------ -------- ---------------------------------------------------
-- Seth Henry      01/22/20 Re-write of original with separate debouncer
-- Seth Henry      01/22/20 Re-write of original with separate debouncer
 
-- Seth Henry      04/16/20 Modified to use Open8 bus record
 
 
library ieee;
library ieee;
  use ieee.std_logic_1164.all;
  use ieee.std_logic_1164.all;
  use ieee.std_logic_unsigned.all;
  use ieee.std_logic_unsigned.all;
  use ieee.std_logic_arith.all;
  use ieee.std_logic_arith.all;
Line 45... Line 46...
 
 
entity o8_btn_int is
entity o8_btn_int is
generic(
generic(
  Num_Buttons                : integer range 1 to 8 := 8;
  Num_Buttons                : integer range 1 to 8 := 8;
  Button_Level               : std_logic := '0';
  Button_Level               : std_logic := '0';
  Address                    : ADDRESS_TYPE := x"0000";
  Address                    : ADDRESS_TYPE := x"0000"
  Reset_Level                : std_logic := '1'
 
);
);
port(
port(
  Clock                      : in  std_logic := '0';
 
  Reset                      : in  std_logic := '0';
 
  uSec_Tick                  : in  std_logic := '0';
 
  --
 
  Open8_Bus                  : in  OPEN8_BUS_TYPE;
  Open8_Bus                  : in  OPEN8_BUS_TYPE;
  Rd_Data                    : out DATA_TYPE;
  Rd_Data                    : out DATA_TYPE;
  Interrupt                  : out std_logic;
  Interrupt                  : out std_logic;
  --
  --
  Button_In                  : in  DATA_TYPE := x"00"
  Button_In                  : in  DATA_TYPE := x"00"
);
);
end entity;
end entity;
 
 
architecture behave of o8_btn_int is
architecture behave of o8_btn_int is
 
 
 
  alias Clock                is Open8_Bus.Clock;
 
  alias Reset                is Open8_Bus.Reset;
 
  alias uSec_Tick            is Open8_Bus.uSec_Tick;
 
 
  constant User_Addr         : std_logic_vector(15 downto 0) := Address;
  constant User_Addr         : std_logic_vector(15 downto 0) := Address;
  alias  Comp_Addr           is Open8_Bus.Address(15 downto 0);
  alias  Comp_Addr           is Open8_Bus.Address(15 downto 0);
  signal Addr_Match          : std_logic  := '0';
  signal Addr_Match          : std_logic  := '0';
  signal Rd_En               : std_logic  := '0';
  signal Rd_En               : std_logic  := '0';
 
 

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