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Line 74... |
------------------ -------- ---------------------------------------------------
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------------------ -------- ---------------------------------------------------
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-- Seth Henry 07/19/06 Design Start
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-- Seth Henry 07/19/06 Design Start
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-- Seth Henry 01/18/11 Fixed BTT instruction to match V8
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-- Seth Henry 01/18/11 Fixed BTT instruction to match V8
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-- Seth Henry 07/22/11 Fixed interrupt transition logic to avoid data
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-- Seth Henry 07/22/11 Fixed interrupt transition logic to avoid data
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-- corruption issues.
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-- corruption issues.
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-- Seth Henry 07/26/11 Optimized logic in ALU, stack pointer, and data path
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-- Seth Henry 07/26/11 Optimized logic in ALU, stack pointer, and data
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-- sections.
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-- path sections.
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-- Seth Henry 07/27/11 Optimized logic for timing, merged blocks into
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-- Seth Henry 07/27/11 Optimized logic for timing, merged blocks into
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-- single entity.
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-- single entity.
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-- Seth Henry 09/20/11 Added BRK_Implements_WAI option, allowing the
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-- processor to wait for an interrupt instead of the
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-- normal BRK behavior.
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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Line 91... |
Line 94... |
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entity Open8_CPU is
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entity Open8_CPU is
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generic(
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generic(
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Stack_Start_Addr : ADDRESS_TYPE := x"007F"; -- Top of Stack
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Stack_Start_Addr : ADDRESS_TYPE := x"007F"; -- Top of Stack
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Allow_Stack_Address_Move : boolean := false; -- Use Normal v8 RSP
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Allow_Stack_Address_Move : boolean := false; -- Use Normal v8 RSP
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BRK_Implements_WAI : boolean := false; -- BRK -> Wait for Int
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ISR_Start_Addr : ADDRESS_TYPE := x"0080"; -- Bottom of ISR vec's
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ISR_Start_Addr : ADDRESS_TYPE := x"0080"; -- Bottom of ISR vec's
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Program_Start_Addr : ADDRESS_TYPE := x"0090"; -- Initial PC location
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Program_Start_Addr : ADDRESS_TYPE := x"0090"; -- Initial PC location
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Default_Interrupt_Mask : DATA_TYPE := x"FF"; -- Enable all Ints
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Default_Interrupt_Mask : DATA_TYPE := x"FF"; -- Enable all Ints
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Enable_CPU_Halt : boolean := false; -- Disable HALT pin
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Enable_CPU_Halt : boolean := false; -- Disable HALT pin
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Enable_Auto_Increment : boolean := false; -- Modify indexed instr
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Enable_Auto_Increment : boolean := false; -- Modify indexed instr
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Line 436... |
SP_Ctrl.Oper <= SP_POP;
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SP_Ctrl.Oper <= SP_POP;
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when SOP_BRK =>
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when SOP_BRK =>
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CPU_Next_State <= BRK_C1;
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CPU_Next_State <= BRK_C1;
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PC_Ctrl.Oper <= PC_REV2;
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PC_Ctrl.Oper <= PC_REV2;
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-- If Break implements Wait for Interrupt
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-- Replace normal flow with a modified
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-- version of INT instruction
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if( BRK_Implements_WAI )then
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CPU_Next_State <= WAIT_FOR_INT;
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PC_Ctrl.Oper <= PC_INCR;
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end if;
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when SOP_JMP =>
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when SOP_JMP =>
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CPU_Next_State <= JMP_C1;
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CPU_Next_State <= JMP_C1;
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Cache_Ctrl <= CACHE_OPER1;
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Cache_Ctrl <= CACHE_OPER1;
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