| Line 201... |
Line 201... |
-- until the lower priority ISR returns or clears
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-- until the lower priority ISR returns or clears
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-- the I bit.
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-- the I bit.
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-- Also added the I bit to the exported flags for
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-- Also added the I bit to the exported flags for
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-- use in memory protection schemes.
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-- use in memory protection schemes.
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-- Seth Henry 04/16/20 Modified to use new Open8 bus record. Also added
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-- Seth Henry 04/16/20 Modified to use new Open8 bus record. Also added
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-- reset and usec_tick logic to drive utility signals
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-- reset and usec_tick logic to drive utility
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-- signals. Also added Halt_Ack output.
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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| Line 230... |
Line 231... |
Clock_Frequency : real -- Clock Frequency
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Clock_Frequency : real -- Clock Frequency
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);
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);
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port(
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port(
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Clock : in std_logic;
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Clock : in std_logic;
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PLL_Locked : in std_logic;
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PLL_Locked : in std_logic;
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CPU_Halt : in std_logic := '0';
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--
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Halt_Req : in std_logic := '0';
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Halt_Ack : out std_logic;
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--
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--
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Open8_Bus : out OPEN8_BUS_TYPE;
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Open8_Bus : out OPEN8_BUS_TYPE;
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Rd_Data : in DATA_TYPE;
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Rd_Data : in DATA_TYPE;
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Interrupts : in INTERRUPT_BUNDLE := x"00"
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Interrupts : in INTERRUPT_BUNDLE := x"00"
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);
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);
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| Line 262... |
Line 265... |
constant INT_VECTOR_7 : ADDRESS_TYPE := ISR_Start_Addr+14;
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constant INT_VECTOR_7 : ADDRESS_TYPE := ISR_Start_Addr+14;
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|
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signal CPU_Next_State : CPU_STATES := IPF_C0;
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signal CPU_Next_State : CPU_STATES := IPF_C0;
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signal CPU_State : CPU_STATES := IPF_C0;
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signal CPU_State : CPU_STATES := IPF_C0;
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|
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signal CPU_Halt_Req : std_logic;
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signal CPU_Halt_Req : std_logic := '0';
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signal CPU_Halt_Ack : std_logic := '0';
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|
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signal Cache_Ctrl : CACHE_MODES := CACHE_IDLE;
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signal Cache_Ctrl : CACHE_MODES := CACHE_IDLE;
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|
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signal Opcode : OPCODE_TYPE := (others => '0');
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signal Opcode : OPCODE_TYPE := (others => '0');
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signal SubOp, SubOp_p1 : SUBOP_TYPE := (others => '0');
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signal SubOp, SubOp_p1 : SUBOP_TYPE := (others => '0');
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| Line 404... |
Line 408... |
--
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--
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INT_Ctrl.Mask_Set <= '0';
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INT_Ctrl.Mask_Set <= '0';
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INT_Ctrl.Soft_Ints <= x"00";
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INT_Ctrl.Soft_Ints <= x"00";
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INT_Ctrl.Incr_ISR <= '0';
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INT_Ctrl.Incr_ISR <= '0';
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Ack_D <= '0';
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Ack_D <= '0';
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--
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Reg := conv_integer(SubOp);
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Reg := conv_integer(SubOp);
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--
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CPU_Halt_Ack <= '0';
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|
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case CPU_State is
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case CPU_State is
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Initial Instruction fetch & decode
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-- Initial Instruction fetch & decode
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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| Line 828... |
Line 834... |
-- operation due to the current instruction
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-- operation due to the current instruction
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DP_Ctrl.Src <= DATA_RD_MEM;
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DP_Ctrl.Src <= DATA_RD_MEM;
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end if;
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end if;
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|
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when WAH_Cx => -- Holds until CPU_Halt_Req is deasserted.
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when WAH_Cx => -- Holds until CPU_Halt_Req is deasserted.
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CPU_Halt_Ack <= '1';
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DP_Ctrl.Src <= DATA_BUS_IDLE;
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DP_Ctrl.Src <= DATA_BUS_IDLE;
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if( CPU_Halt_Req = '0' )then
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if( CPU_Halt_Req = '0' )then
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CPU_Next_State <= IPF_C0;
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CPU_Next_State <= IPF_C0;
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DP_Ctrl.Src <= DATA_RD_MEM;
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DP_Ctrl.Src <= DATA_RD_MEM;
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end if;
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end if;
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| Line 930... |
Line 937... |
Operand2 <= x"00";
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Operand2 <= x"00";
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Instr_Prefetch <= '0';
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Instr_Prefetch <= '0';
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Prefetch <= x"00";
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Prefetch <= x"00";
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|
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CPU_Halt_Req <= '0';
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CPU_Halt_Req <= '0';
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Halt_Ack <= '0';
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|
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Open8_Bus.Wr_En <= '0';
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Open8_Bus.Wr_En <= '0';
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Open8_Bus.Wr_Data <= OPEN8_NULLBUS;
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Open8_Bus.Wr_Data <= OPEN8_NULLBUS;
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Open8_Bus.Rd_En <= '1';
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Open8_Bus.Rd_En <= '1';
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|
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| Line 962... |
Line 970... |
|
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Open8_Bus.GP_Flags <= (others => '0');
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Open8_Bus.GP_Flags <= (others => '0');
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|
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elsif( rising_edge(Clock) )then
|
elsif( rising_edge(Clock) )then
|
|
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CPU_Halt_Req <= CPU_Halt;
|
CPU_Halt_Req <= Halt_Req;
|
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Halt_Ack <= CPU_Halt_Ack;
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|
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Open8_Bus.Wr_En <= '0';
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Open8_Bus.Wr_En <= '0';
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Open8_Bus.Wr_Data <= OPEN8_NULLBUS;
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Open8_Bus.Wr_Data <= OPEN8_NULLBUS;
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Open8_Bus.Rd_En <= '0';
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Open8_Bus.Rd_En <= '0';
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