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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_elapsed_usec.vhd] - Diff between revs 276 and 296

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Rev 276 Rev 296
Line 121... Line 121...
 
 
      Update_Shadow          <= '0';
      Update_Shadow          <= '0';
      Timer_Reset            <= '0';
      Timer_Reset            <= '0';
      if( Wr_En_q = '1' and Write_Qual = '1' )then
      if( Wr_En_q = '1' and Write_Qual = '1' )then
        case( Reg_Sel_q )is
        case( Reg_Sel_q )is
          when "00" =>
          when "00" | "01" | "10" =>
            Update_Shadow    <= '1';
 
          when "01" =>
 
            Update_Shadow    <= '1';
 
          when "10" =>
 
            Update_Shadow    <= '1';
            Update_Shadow    <= '1';
          when "11" =>
          when "11" =>
            Timer_Reset      <= Wr_Data_q(6);
            Timer_Reset      <= Wr_Data_q(6);
            Timer_En_Req     <= Wr_Data_q(7);
            Timer_En_Req     <= Wr_Data_q(7);
          when others => null;
          when others => null;

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