OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [o8_hd44780_8b.vhd] - Diff between revs 262 and 322

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 262 Rev 322
Line 134... Line 134...
  signal Reg_Sel             : std_logic := '0';
  signal Reg_Sel             : std_logic := '0';
  signal Reg_Data            : DATA_TYPE := x"00";
  signal Reg_Data            : DATA_TYPE := x"00";
 
 
  signal Tx_Ready            : std_logic := '0';
  signal Tx_Ready            : std_logic := '0';
 
 
  constant LCD_CONFIG1       : std_logic_vector(7 downto 0) := x"38"; -- Set 4-bit, 2-line mode
  constant LCD_CONFIG1       : std_logic_vector(7 downto 0) := x"38"; -- Set 8-bit, 2-line mode
  constant LCD_CONFIG2       : std_logic_vector(7 downto 0) := x"0C"; -- Turn display on, no cursor
  constant LCD_CONFIG2       : std_logic_vector(7 downto 0) := x"0C"; -- Turn display on, no cursor
  constant LCD_CONFIG3       : std_logic_vector(7 downto 0) := x"01"; -- Clear display
  constant LCD_CONFIG3       : std_logic_vector(7 downto 0) := x"01"; -- Clear display
  constant LCD_CONFIG4       : std_logic_vector(7 downto 0) := x"06"; -- Positive increment, no shift
  constant LCD_CONFIG4       : std_logic_vector(7 downto 0) := x"06"; -- Positive increment, no shift
  constant LCD_CONFIG5       : std_logic_vector(7 downto 0) := x"2A"; -- Print a "*"
  constant LCD_CONFIG5       : std_logic_vector(7 downto 0) := x"2A"; -- Print a "*"
  constant LCD_CONFIG6       : std_logic_vector(7 downto 0) := x"02"; -- Reset the cursor
  constant LCD_CONFIG6       : std_logic_vector(7 downto 0) := x"02"; -- Reset the cursor

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.