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Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [o8_ltc2355_2p.vhd] - Diff between revs 322 and 327

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Rev 322 Rev 327
Line 64... Line 64...
  Clock_Frequency            : real;
  Clock_Frequency            : real;
  Address                    : ADDRESS_TYPE
  Address                    : ADDRESS_TYPE
);
);
port(
port(
  Open8_Bus                  : in  OPEN8_BUS_TYPE;
  Open8_Bus                  : in  OPEN8_BUS_TYPE;
 
  Write_Qual                 : in  std_logic := '1';
  Rd_Data                    : out DATA_TYPE;
  Rd_Data                    : out DATA_TYPE;
  Interrupt                  : out std_logic;
  Interrupt                  : out std_logic;
  -- ADC IF
  -- ADC IF
  ADC_SCLK                   : out std_logic;
  ADC_SCLK                   : out std_logic;
  ADC_CONV                   : out std_logic;
  ADC_CONV                   : out std_logic;
Line 116... Line 117...
  signal ADC_Ready           : std_logic := '0';
  signal ADC_Ready           : std_logic := '0';
 
 
begin
begin
 
 
  Addr_Match                 <= '1' when Comp_Addr = User_Addr else '0';
  Addr_Match                 <= '1' when Comp_Addr = User_Addr else '0';
  Wr_En_d                    <= Addr_Match and Open8_Bus.Wr_En;
  Wr_En_d                    <= Addr_Match and Write_Qual and Open8_Bus.Wr_En;
  Rd_En_d                    <= Addr_Match and Open8_Bus.Rd_En;
  Rd_En_d                    <= Addr_Match and Open8_Bus.Rd_En;
 
 
  io_reg: process( Clock, Reset )
  io_reg: process( Clock, Reset )
  begin
  begin
    if( Reset = Reset_Level )then
    if( Reset = Reset_Level )then

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