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https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
[/] [open8_urisc/] [trunk/] [VHDL/] [o8_mavg_8ch_16b_64d.vhd] - Diff between revs 325 and 327
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Rev 325 |
Rev 327 |
Line 127... |
Line 127... |
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signal AVG_Channel : std_logic_vector(2 downto 0) := (others => '0');
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signal AVG_Channel : std_logic_vector(2 downto 0) := (others => '0');
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signal AVG_Out : std_logic_vector(15 downto 0) := (others => '0');
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signal AVG_Out : std_logic_vector(15 downto 0) := (others => '0');
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alias AVG_Out_L is AVG_Out(7 downto 0);
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alias AVG_Out_L is AVG_Out(7 downto 0);
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alias AVG_Out_H is AVG_Out(7 downto 0);
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alias AVG_Out_H is AVG_Out(15 downto 8);
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signal AVG_Int_En : std_logic := '0';
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signal AVG_Int_En : std_logic := '0';
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signal Flush_Int_En : std_logic := '0';
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signal Flush_Int_En : std_logic := '0';
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begin
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begin
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