Subversion Repositories open8_urisc

-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

--

--

-- VHDL Units :  o8_rom_32k

-- VHDL Units :  o8_rom_32k

-- Description:  Provides a wrapper layer for a 32kx8 ROM model

-- Description:  Provides a wrapper layer for a 32kx8 ROM model

library ieee;

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_1164.all;

use ieee.std_logic_unsigned.all;

use ieee.std_logic_unsigned.all;

use ieee.std_logic_arith.all;

use ieee.std_logic_arith.all;

library work;

library work;

  use work.open8_pkg.all;

  use work.open8_pkg.all;

entity o8_rom_32k is

entity o8_rom_32k is

generic(

generic(

  Address                    : ADDRESS_TYPE

  Address                    : ADDRESS_TYPE

);

);

port(

port(

  Open8_Bus                  : in  OPEN8_BUS_TYPE;

  Open8_Bus                  : in  OPEN8_BUS_TYPE;

  Rd_Data                    : out DATA_TYPE

  Rd_Data                    : out DATA_TYPE

);

);

end entity;

end entity;

architecture behave of o8_rom_32k is

architecture behave of o8_rom_32k is

  constant User_Addr         : std_logic_vector(15 downto 15) :=

  constant User_Addr         : std_logic_vector(15 downto 15) :=

                               Address(15 downto 15);

                               Address(15 downto 15);

  alias Comp_Addr            is Open8_Bus.Address(15 downto 15);

  alias Comp_Addr            is Open8_Bus.Address(15 downto 15);

  alias ROM_Addr             is Open8_Bus.Address(14 downto 0);

  alias ROM_Addr             is Open8_Bus.Address(14 downto 0);