| Line 184... |
Line 184... |
-- This decode needs to happen immediately, to give the RAM a chance to
|
-- This decode needs to happen immediately, to give the RAM a chance to
|
-- do the lookup before we have to set Rd_Data
|
-- do the lookup before we have to set Rd_Data
|
Base_Addr_Match <= '1' when Base_Addr = CPU_Upper_Addr else '0';
|
Base_Addr_Match <= '1' when Base_Addr = CPU_Upper_Addr else '0';
|
DP_A_Wr_En <= Base_Addr_Match and Wr_Enable;
|
DP_A_Wr_En <= Base_Addr_Match and Wr_Enable;
|
|
|
CPU_RAM_proc: process( Reset, Clock )
|
CPU_IF_proc: process( Reset, Clock )
|
begin
|
begin
|
if( Reset = Reset_Level )then
|
if( Reset = Reset_Level )then
|
Reg_Addr <= (others => '0');
|
Reg_Addr <= (others => '0');
|
Reg_Wr_En <= '0';
|
Reg_Wr_En <= '0';
|
Reg_Clk_Sel <= '0';
|
Reg_Clk_Sel <= '0';
|
Reg_TxS_Sel <= '0';
|
Reg_TxS_Sel <= '0';
|
DP_A_Rd_En <= '0';
|
DP_A_Rd_En <= '0';
|
Rd_Data <= OPEN8_NULLBUS;
|
Rd_Data <= OPEN8_NULLBUS;
|
|
Interrupt <= '0';
|
elsif( rising_edge(Clock) )then
|
elsif( rising_edge(Clock) )then
|
Reg_Addr <= Reg_Upper_Addr;
|
Reg_Addr <= Reg_Upper_Addr;
|
Reg_Sel <= Reg_Lower_Addr;
|
Reg_Sel <= Reg_Lower_Addr;
|
Reg_Wr_En <= Base_Addr_Match and Wr_Enable;
|
Reg_Wr_En <= Base_Addr_Match and Wr_Enable;
|
|
|
| Line 210... |
Line 211... |
DP_A_Rd_En <= Base_Addr_Match and Rd_Enable;
|
DP_A_Rd_En <= Base_Addr_Match and Rd_Enable;
|
Rd_Data <= OPEN8_NULLBUS;
|
Rd_Data <= OPEN8_NULLBUS;
|
if( DP_A_Rd_En = '1' )then
|
if( DP_A_Rd_En = '1' )then
|
Rd_Data <= DP_A_Rd_Data;
|
Rd_Data <= DP_A_Rd_Data;
|
end if;
|
end if;
|
|
|
|
Interrupt <= RX_Interrupt or TX_Interrupt;
|
end if;
|
end if;
|
end process;
|
end process;
|
|
|
-- ***************************************************************************
|
-- ***************************************************************************
|
-- * Shared Dual-Port Memory *
|
-- * Shared Dual-Port Memory *
|
| Line 472... |
Line 475... |
RX_Frame_Data => RX_Frame_Data,
|
RX_Frame_Data => RX_Frame_Data,
|
--
|
--
|
RX_Interrupt => RX_Interrupt
|
RX_Interrupt => RX_Interrupt
|
);
|
);
|
|
|
-- ***************************************************************************
|
|
-- * Merge Interrupts *
|
|
-- ***************************************************************************
|
|
|
|
Interrupt_merge_proc: process( Clock, Reset )
|
|
begin
|
|
if( Reset = Reset_Level )then
|
|
Interrupt <= '0';
|
|
elsif( rising_edge(Clock) )then
|
|
Interrupt <= RX_Interrupt or TX_Interrupt;
|
|
end if;
|
|
end process;
|
|
|
|
end architecture;
|
end architecture;
|
No newline at end of file
|
No newline at end of file
|
