| Line 77... |
Line 77... |
signal Rd_En : std_logic := '0';
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signal Rd_En : std_logic := '0';
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signal Rd_En_q : std_logic := '0';
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signal Rd_En_q : std_logic := '0';
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signal Interval : DATA_TYPE := x"00";
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signal Interval : DATA_TYPE := x"00";
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signal Update_Interval : std_logic;
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signal Update_Interval : std_logic;
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signal New_Interval : DATA_TYPE := x"00";
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signal Timer_Cnt : DATA_TYPE := x"00";
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signal Timer_Cnt : DATA_TYPE := x"00";
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constant DLY_1USEC_VAL : integer := integer(Sys_Freq / 1000000.0);
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constant DLY_1USEC_VAL : integer := integer(Sys_Freq / 1000000.0);
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constant DLY_1USEC_WDT : integer := ceil_log2(DLY_1USEC_VAL - 1);
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constant DLY_1USEC_WDT : integer := ceil_log2(DLY_1USEC_VAL - 1);
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constant DLY_1USEC : std_logic_vector :=
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constant DLY_1USEC : std_logic_vector :=
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| Line 102... |
Line 101... |
Wr_Data_q <= x"00";
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Wr_Data_q <= x"00";
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Rd_En <= '0';
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Rd_En <= '0';
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Rd_Data <= OPEN8_NULLBUS;
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Rd_Data <= OPEN8_NULLBUS;
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Interval <= x"00";
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Interval <= x"00";
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Update_Interval <= '0';
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Update_Interval <= '0';
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New_Interval <= x"00";
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elsif( rising_edge( Clock ) )then
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elsif( rising_edge( Clock ) )then
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Wr_En <= Addr_Match and Wr_Enable;
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Wr_En <= Addr_Match and Wr_Enable;
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Wr_Data_q <= Wr_Data;
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Wr_Data_q <= Wr_Data;
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Update_Interval <= '0';
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Update_Interval <= '0';
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if( Wr_En = '1' )then
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if( Wr_En = '1' )then
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New_Interval <= Wr_Data_q;
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Interval <= Wr_Data_q;
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Update_Interval <= '1';
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Update_Interval <= '1';
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end if;
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end if;
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Rd_Data <= (others => '0');
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Rd_Data <= (others => '0');
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Rd_En <= Addr_Match and Rd_Enable;
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Rd_En <= Addr_Match and Rd_Enable;
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| Line 143... |
Line 141... |
Timer_Cnt <= x"00";
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Timer_Cnt <= x"00";
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Interrupt <= '0';
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Interrupt <= '0';
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elsif( rising_edge(Clock) )then
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elsif( rising_edge(Clock) )then
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Interrupt <= '0';
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Interrupt <= '0';
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Timer_Cnt <= Timer_Cnt - uSec_Tick_i;
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Timer_Cnt <= Timer_Cnt - uSec_Tick_i;
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if( or_reduce(Timer_Cnt) = '0' )then
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if( Update_Interval = '1' )then
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Timer_Cnt <= Interval;
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elsif( or_reduce(Timer_Cnt) = '0' )then
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Timer_Cnt <= Interval;
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Timer_Cnt <= Interval;
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Interrupt <= or_reduce(Interval); -- Only trigger on Int > 0
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Interrupt <= or_reduce(Interval); -- Only trigger on Int > 0
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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