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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_sys_timer_ii.vhd] - Diff between revs 229 and 240
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Rev 240 |
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-- Offset Bitfield Description Read/Write
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-- Offset Bitfield Description Read/Write
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-- 0x00 AAAAAAAA Req Interval Byte 0 (RW)
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-- 0x00 AAAAAAAA Req Interval Byte 0 (RW)
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-- 0x01 AAAAAAAA Req Interval Byte 1 (RW)
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-- 0x01 AAAAAAAA Req Interval Byte 1 (RW)
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-- 0x02 AAAAAAAA Req Interval Byte 2 (RW)
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-- 0x02 AAAAAAAA Req Interval Byte 2 (RW)
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-- 0x03 BA------ Control/Status Register (RW)
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-- 0x03 BA------ Control/Status Register (RW)
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-- A: Update timer (WR) or Update pending (RD)
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-- A: Update timer (WR) or pending (RD) (RW)
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-- B: Output Enable
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-- B: Output Enable
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--
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--
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-- Notes : Setting the output to 0x000000 will disable the timer
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-- Notes : Setting the output to 0x000000 will disable the timer
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-- : Update pending is true if bit A is 1, otherwise false
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-- : Update pending is true if bit A is 1, otherwise false
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--
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--
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