URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
[/] [open8_urisc/] [trunk/] [VHDL/] [sdlc_crc16_ccitt.vhd] - Diff between revs 205 and 220
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 205 |
Rev 220 |
Line 22... |
Line 22... |
-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
--
|
--
|
-- VHDL Units : crc16_ccitt
|
-- VHDL Units : crc16_ccitt
|
-- Description: Implements the 16-bit CCITT CRC on byte-wide data. Logic
|
-- Description: Implements the 16-bit CCITT CRC on byte-wide data. Logic
|
-- equations were taken from Intel/Altera app note AN049.
|
-- equations were taken from Intel/Altera app note AN049.
|
|
--
|
|
-- Revision History
|
|
-- Author Date Change
|
|
------------------ -------- ---------------------------------------------------
|
|
-- Seth Henry 04/14/20 Code cleanup and revision section added
|
|
|
library ieee;
|
library ieee;
|
use ieee.std_logic_1164.all;
|
use ieee.std_logic_1164.all;
|
|
|
library work;
|
library work;
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.