| Line 164... |
Line 164... |
|
|
char *current_inputline;
|
char *current_inputline;
|
extern char *yytext;
|
extern char *yytext;
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int yyerror (char *);
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int yyerror (char *);
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|
|
|
/* Used to set SRCx fields to all 1s as described in the PRM. */
|
|
static Register reg7 = {REG_R7, 0};
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|
|
void error (char *format, ...)
|
void error (char *format, ...)
|
{
|
{
|
va_list ap;
|
va_list ap;
|
static char buffer[2000];
|
static char buffer[2000];
|
|
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| Line 799... |
Line 802... |
| REG ASSIGN LPAREN a_plusassign REG_A RPAREN
|
| REG ASSIGN LPAREN a_plusassign REG_A RPAREN
|
{
|
{
|
if (IS_DREG ($1) && !IS_A1 ($4) && IS_A1 ($5))
|
if (IS_DREG ($1) && !IS_A1 ($4) && IS_A1 ($5))
|
{
|
{
|
notethat ("dsp32alu: dregs = ( A0 += A1 )\n");
|
notethat ("dsp32alu: dregs = ( A0 += A1 )\n");
|
$$ = DSP32ALU (11, 0, 0, &$1, 0, 0, 0, 0, 0);
|
$$ = DSP32ALU (11, 0, 0, &$1, ®7, ®7, 0, 0, 0);
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}
|
}
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else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
| HALF_REG ASSIGN LPAREN a_plusassign REG_A RPAREN
|
| HALF_REG ASSIGN LPAREN a_plusassign REG_A RPAREN
|
{
|
{
|
if (!IS_A1 ($4) && IS_A1 ($5))
|
if (!IS_A1 ($4) && IS_A1 ($5))
|
{
|
{
|
notethat ("dsp32alu: dregs_half = ( A0 += A1 )\n");
|
notethat ("dsp32alu: dregs_half = ( A0 += A1 )\n");
|
$$ = DSP32ALU (11, IS_H ($1), 0, &$1, 0, 0, 0, 0, 1);
|
$$ = DSP32ALU (11, IS_H ($1), 0, &$1, ®7, ®7, 0, 0, 1);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
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return yyerror ("Register mismatch");
|
}
|
}
|
| A_ZERO_DOT_H ASSIGN HALF_REG
|
| A_ZERO_DOT_H ASSIGN HALF_REG
|
| Line 896... |
Line 899... |
return yyerror ("Illegal dest register combination");
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return yyerror ("Illegal dest register combination");
|
|
|
if (IS_DREG ($1) && IS_DREG ($7))
|
if (IS_DREG ($1) && IS_DREG ($7))
|
{
|
{
|
notethat ("dsp32alu: dregs = A1.l + A1.h, dregs = A0.l + A0.h \n");
|
notethat ("dsp32alu: dregs = A1.l + A1.h, dregs = A0.l + A0.h \n");
|
$$ = DSP32ALU (12, 0, &$1, &$7, 0, 0, 0, 0, 1);
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$$ = DSP32ALU (12, 0, &$1, &$7, ®7, ®7, 0, 0, 1);
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}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
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return yyerror ("Register mismatch");
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}
|
}
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|
|
| Line 912... |
Line 915... |
|
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if (IS_DREG ($1) && IS_DREG ($7) && !REG_SAME ($3, $5)
|
if (IS_DREG ($1) && IS_DREG ($7) && !REG_SAME ($3, $5)
|
&& IS_A1 ($9) && !IS_A1 ($11))
|
&& IS_A1 ($9) && !IS_A1 ($11))
|
{
|
{
|
notethat ("dsp32alu: dregs = A1 + A0 , dregs = A1 - A0 (amod1)\n");
|
notethat ("dsp32alu: dregs = A1 + A0 , dregs = A1 - A0 (amod1)\n");
|
$$ = DSP32ALU (17, 0, &$1, &$7, 0, 0, $12.s0, $12.x0, 0);
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$$ = DSP32ALU (17, 0, &$1, &$7, ®7, ®7, $12.s0, $12.x0, 0);
|
|
|
}
|
}
|
else if (IS_DREG ($1) && IS_DREG ($7) && !REG_SAME ($3, $5)
|
else if (IS_DREG ($1) && IS_DREG ($7) && !REG_SAME ($3, $5)
|
&& !IS_A1 ($9) && IS_A1 ($11))
|
&& !IS_A1 ($9) && IS_A1 ($11))
|
{
|
{
|
notethat ("dsp32alu: dregs = A0 + A1 , dregs = A0 - A1 (amod1)\n");
|
notethat ("dsp32alu: dregs = A0 + A1 , dregs = A0 - A1 (amod1)\n");
|
$$ = DSP32ALU (17, 0, &$1, &$7, 0, 0, $12.s0, $12.x0, 1);
|
$$ = DSP32ALU (17, 0, &$1, &$7, ®7, ®7, $12.s0, $12.x0, 1);
|
}
|
}
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else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
| Line 993... |
Line 996... |
return yyerror ("Dregs expected");
|
return yyerror ("Dregs expected");
|
}
|
}
|
| a_assign ABS REG_A
|
| a_assign ABS REG_A
|
{
|
{
|
notethat ("dsp32alu: Ax = ABS Ax\n");
|
notethat ("dsp32alu: Ax = ABS Ax\n");
|
$$ = DSP32ALU (16, IS_A1 ($1), 0, 0, 0, 0, 0, 0, IS_A1 ($3));
|
$$ = DSP32ALU (16, IS_A1 ($1), 0, 0, ®7, ®7, 0, 0, IS_A1 ($3));
|
}
|
}
|
| A_ZERO_DOT_L ASSIGN HALF_REG
|
| A_ZERO_DOT_L ASSIGN HALF_REG
|
{
|
{
|
if (IS_DREG_L ($3))
|
if (IS_DREG_L ($3))
|
{
|
{
|
| Line 1160... |
Line 1163... |
}
|
}
|
|
|
| a_assign MINUS REG_A
|
| a_assign MINUS REG_A
|
{
|
{
|
notethat ("dsp32alu: Ax = - Ax\n");
|
notethat ("dsp32alu: Ax = - Ax\n");
|
$$ = DSP32ALU (14, IS_A1 ($1), 0, 0, 0, 0, 0, 0, IS_A1 ($3));
|
$$ = DSP32ALU (14, IS_A1 ($1), 0, 0, ®7, ®7, 0, 0, IS_A1 ($3));
|
}
|
}
|
| HALF_REG ASSIGN HALF_REG plus_minus HALF_REG amod1
|
| HALF_REG ASSIGN HALF_REG plus_minus HALF_REG amod1
|
{
|
{
|
notethat ("dsp32alu: dregs_lo = dregs_lo +- dregs_lo (amod1)\n");
|
notethat ("dsp32alu: dregs_lo = dregs_lo +- dregs_lo (amod1)\n");
|
$$ = DSP32ALU (2 | $4.r0, IS_H ($1), 0, &$1, &$3, &$5,
|
$$ = DSP32ALU (2 | $4.r0, IS_H ($1), 0, &$1, &$3, &$5,
|
| Line 1173... |
Line 1176... |
| a_assign a_assign expr
|
| a_assign a_assign expr
|
{
|
{
|
if (EXPR_VALUE ($3) == 0 && !REG_SAME ($1, $2))
|
if (EXPR_VALUE ($3) == 0 && !REG_SAME ($1, $2))
|
{
|
{
|
notethat ("dsp32alu: A1 = A0 = 0\n");
|
notethat ("dsp32alu: A1 = A0 = 0\n");
|
$$ = DSP32ALU (8, 0, 0, 0, 0, 0, 0, 0, 2);
|
$$ = DSP32ALU (8, 0, 0, 0, ®7, ®7, 0, 0, 2);
|
}
|
}
|
else
|
else
|
return yyerror ("Bad value, 0 expected");
|
return yyerror ("Bad value, 0 expected");
|
}
|
}
|
|
|
| Line 1185... |
Line 1188... |
| a_assign REG_A LPAREN S RPAREN
|
| a_assign REG_A LPAREN S RPAREN
|
{
|
{
|
if (REG_SAME ($1, $2))
|
if (REG_SAME ($1, $2))
|
{
|
{
|
notethat ("dsp32alu: Ax = Ax (S)\n");
|
notethat ("dsp32alu: Ax = Ax (S)\n");
|
$$ = DSP32ALU (8, 0, 0, 0, 0, 0, 1, 0, IS_A1 ($1));
|
$$ = DSP32ALU (8, 0, 0, 0, ®7, ®7, 1, 0, IS_A1 ($1));
|
}
|
}
|
else
|
else
|
return yyerror ("Registers must be equal");
|
return yyerror ("Registers must be equal");
|
}
|
}
|
|
|
| Line 1229... |
Line 1232... |
| a_assign REG_A
|
| a_assign REG_A
|
{
|
{
|
if (!REG_SAME ($1, $2))
|
if (!REG_SAME ($1, $2))
|
{
|
{
|
notethat ("dsp32alu: An = Am\n");
|
notethat ("dsp32alu: An = Am\n");
|
$$ = DSP32ALU (8, 0, 0, 0, 0, 0, IS_A1 ($1), 0, 3);
|
$$ = DSP32ALU (8, 0, 0, 0, ®7, ®7, IS_A1 ($1), 0, 3);
|
}
|
}
|
else
|
else
|
return yyerror ("Accu reg arguments must differ");
|
return yyerror ("Accu reg arguments must differ");
|
}
|
}
|
|
|
| Line 1349... |
Line 1352... |
return yyerror ("Low reg expected");
|
return yyerror ("Low reg expected");
|
|
|
if (IS_DREG ($1) && $3.regno == REG_A0x)
|
if (IS_DREG ($1) && $3.regno == REG_A0x)
|
{
|
{
|
notethat ("dsp32alu: dregs_lo = A0.x\n");
|
notethat ("dsp32alu: dregs_lo = A0.x\n");
|
$$ = DSP32ALU (10, 0, 0, &$1, 0, 0, 0, 0, 0);
|
$$ = DSP32ALU (10, 0, 0, &$1, ®7, ®7, 0, 0, 0);
|
}
|
}
|
else if (IS_DREG ($1) && $3.regno == REG_A1x)
|
else if (IS_DREG ($1) && $3.regno == REG_A1x)
|
{
|
{
|
notethat ("dsp32alu: dregs_lo = A1.x\n");
|
notethat ("dsp32alu: dregs_lo = A1.x\n");
|
$$ = DSP32ALU (10, 0, 0, &$1, 0, 0, 0, 0, 1);
|
$$ = DSP32ALU (10, 0, 0, &$1, ®7, ®7, 0, 0, 1);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
| Line 1387... |
Line 1390... |
| a_assign ABS REG_A COMMA a_assign ABS REG_A
|
| a_assign ABS REG_A COMMA a_assign ABS REG_A
|
{
|
{
|
if (REG_SAME ($1, $3) && REG_SAME ($5, $7) && !REG_SAME ($1, $5))
|
if (REG_SAME ($1, $3) && REG_SAME ($5, $7) && !REG_SAME ($1, $5))
|
{
|
{
|
notethat ("dsp32alu: A1 = ABS A1 , A0 = ABS A0\n");
|
notethat ("dsp32alu: A1 = ABS A1 , A0 = ABS A0\n");
|
$$ = DSP32ALU (16, 0, 0, 0, 0, 0, 0, 0, 3);
|
$$ = DSP32ALU (16, 0, 0, 0, ®7, ®7, 0, 0, 3);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
| a_assign MINUS REG_A COMMA a_assign MINUS REG_A
|
| a_assign MINUS REG_A COMMA a_assign MINUS REG_A
|
{
|
{
|
if (REG_SAME ($1, $3) && REG_SAME ($5, $7) && !REG_SAME ($1, $5))
|
if (REG_SAME ($1, $3) && REG_SAME ($5, $7) && !REG_SAME ($1, $5))
|
{
|
{
|
notethat ("dsp32alu: A1 = - A1 , A0 = - A0\n");
|
notethat ("dsp32alu: A1 = - A1 , A0 = - A0\n");
|
$$ = DSP32ALU (14, 0, 0, 0, 0, 0, 0, 0, 3);
|
$$ = DSP32ALU (14, 0, 0, 0, ®7, ®7, 0, 0, 3);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
| a_minusassign REG_A w32_or_nothing
|
| a_minusassign REG_A w32_or_nothing
|
{
|
{
|
if (!IS_A1 ($1) && IS_A1 ($2))
|
if (!IS_A1 ($1) && IS_A1 ($2))
|
{
|
{
|
notethat ("dsp32alu: A0 -= A1\n");
|
notethat ("dsp32alu: A0 -= A1\n");
|
$$ = DSP32ALU (11, 0, 0, 0, 0, 0, $3.r0, 0, 3);
|
$$ = DSP32ALU (11, 0, 0, 0, ®7, ®7, $3.r0, 0, 3);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
| Line 1469... |
Line 1472... |
| REG_A _PLUS_ASSIGN REG_A w32_or_nothing
|
| REG_A _PLUS_ASSIGN REG_A w32_or_nothing
|
{
|
{
|
if (!IS_A1 ($1) && IS_A1 ($3))
|
if (!IS_A1 ($1) && IS_A1 ($3))
|
{
|
{
|
notethat ("dsp32alu: A0 += A1 (W32)\n");
|
notethat ("dsp32alu: A0 += A1 (W32)\n");
|
$$ = DSP32ALU (11, 0, 0, 0, 0, 0, $4.r0, 0, 2);
|
$$ = DSP32ALU (11, 0, 0, 0, ®7, ®7, $4.r0, 0, 2);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
| Line 1548... |
Line 1551... |
| a_assign REG_A LPAREN S RPAREN COMMA a_assign REG_A LPAREN S RPAREN
|
| a_assign REG_A LPAREN S RPAREN COMMA a_assign REG_A LPAREN S RPAREN
|
{
|
{
|
if (REG_SAME ($1, $2) && REG_SAME ($7, $8) && !REG_SAME ($1, $7))
|
if (REG_SAME ($1, $2) && REG_SAME ($7, $8) && !REG_SAME ($1, $7))
|
{
|
{
|
notethat ("dsp32alu: A1 = A1 (S) , A0 = A0 (S)\n");
|
notethat ("dsp32alu: A1 = A1 (S) , A0 = A0 (S)\n");
|
$$ = DSP32ALU (8, 0, 0, 0, 0, 0, 1, 0, 2);
|
$$ = DSP32ALU (8, 0, 0, 0, ®7, ®7, 1, 0, 2);
|
}
|
}
|
else
|
else
|
return yyerror ("Register mismatch");
|
return yyerror ("Register mismatch");
|
}
|
}
|
|
|
