OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [gas/] [doc/] [c-i386.texi] - Diff between revs 160 and 166

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 160 Rev 166
Line 143... Line 143...
@code{nosse},
@code{nosse},
@code{avx},
@code{avx},
@code{avx2},
@code{avx2},
@code{noavx},
@code{noavx},
@code{vmx},
@code{vmx},
 
@code{vmfunc},
@code{smx},
@code{smx},
@code{xsave},
@code{xsave},
@code{xsaveopt},
@code{xsaveopt},
@code{aes},
@code{aes},
@code{pclmul},
@code{pclmul},
Line 156... Line 157...
@code{bmi2},
@code{bmi2},
@code{fma},
@code{fma},
@code{movbe},
@code{movbe},
@code{ept},
@code{ept},
@code{lzcnt},
@code{lzcnt},
 
@code{hle},
 
@code{rtm},
@code{invpcid},
@code{invpcid},
@code{clflush},
@code{clflush},
@code{lwp},
@code{lwp},
@code{fma4},
@code{fma4},
@code{xop},
@code{xop},
Line 437... Line 440...
@cindex encoding options, i386
@cindex encoding options, i386
@cindex encoding options, x86-64
@cindex encoding options, x86-64
 
 
Different encoding options can be specified via optional mnemonic
Different encoding options can be specified via optional mnemonic
suffix.  @samp{.s} suffix swaps 2 register operands in encoding when
suffix.  @samp{.s} suffix swaps 2 register operands in encoding when
moving from one register to another.  @samp{.d32} suffix forces 32bit
moving from one register to another.  @samp{.d8} or @samp{.d32} suffix
displacement in encoding.
prefers 8bit or 32bit displacement in encoding.
 
 
@cindex conversion instructions, i386
@cindex conversion instructions, i386
@cindex i386 conversion instructions
@cindex i386 conversion instructions
@cindex conversion instructions, x86-64
@cindex conversion instructions, x86-64
@cindex x86-64 conversion instructions
@cindex x86-64 conversion instructions
Line 1012... Line 1015...
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
@item @samp{.avx} @tab @samp{.vmx} @tab @samp{.smx} @tab @samp{.ept}
@item @samp{.avx} @tab @samp{.vmx} @tab @samp{.smx} @tab @samp{.ept}
@item @samp{.clflush} @tab @samp{.movbe} @tab @samp{.xsave} @tab @samp{.xsaveopt}
@item @samp{.clflush} @tab @samp{.movbe} @tab @samp{.xsave} @tab @samp{.xsaveopt}
@item @samp{.aes} @tab @samp{.pclmul} @tab @samp{.fma} @tab @samp{.fsgsbase}
@item @samp{.aes} @tab @samp{.pclmul} @tab @samp{.fma} @tab @samp{.fsgsbase}
@item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
@item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
@item @samp{.lzcnt} @tab @samp{.invpcid}
@item @samp{.lzcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc} @tab @samp{.hle}
 
@item @samp{.rtm}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop}
@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop}
@item @samp{.padlock}
@item @samp{.padlock}
@end multitable
@end multitable

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.