URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
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| Rev 17 |
Rev 161 |
| Line 51... |
Line 51... |
{
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{
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return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_IU) || (x == M_T)
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return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_IU) || (x == M_T)
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|| (x == M_TFU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IH);
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|| (x == M_TFU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IH);
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}
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}
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static inline int is_macmod_signed (int x)
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{
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return (x == 0) || (x == M_IS) || (x == M_T) || (x == M_S2RND)
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|| (x == M_ISS2) || (x == M_IH) || (x == M_W32);
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}
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/* dsp32mac
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/* dsp32mac
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+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
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+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
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| 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
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| 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
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|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
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|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
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+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
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+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
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