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https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
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#source: link-hcs12.s -m68hcs12
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#source: link-hcs12.s -m68hcs12
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#source: link-hc12.s -m68hc12
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#source: link-hc12.s -m68hc12
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#as: -mshort
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#as: -mshort
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#ld: -m m68hc12elf
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#ld: -m m68hc12elf
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#objdump: -p -d --prefix-addresses -r
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#objdump: -p -d --prefix-addresses -r
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#target: m6811-*-* m6812-*-*
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.*: file format elf32\-m68hc12
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.*: file format elf32\-m68hc12
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Program Header:
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Program Header:
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LOAD off 0x0+ vaddr 0x0+1000 paddr 0x0+1000 align 2\*\*12
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filesz 0x0+100 memsz 0x0+100 flags rw-
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LOAD off 0x0+1000 vaddr 0x0+8000 paddr 0x0+8000 align 2\*\*12
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LOAD off 0x0+1000 vaddr 0x0+8000 paddr 0x0+8000 align 2\*\*12
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filesz 0x0+6 memsz 0x0+6 flags r-x
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filesz 0x0+6 memsz 0x0+6 flags r-x
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LOAD off 0x0+1100 vaddr 0x0+1100 paddr 0x0+8006 align 2\*\*12
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filesz 0x0+ memsz 0x0+ flags rw-
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private flags = 22:\[abi=16\-bit int, 64\-bit double, cpu=HCS12\] \[memory=flat\]
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private flags = 22:\[abi=16\-bit int, 64\-bit double, cpu=HCS12\] \[memory=flat\]
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Disassembly of section .text:
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Disassembly of section .text:
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0+8000 <_start> jsr 0+8005
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0+8000 <_start> jsr 0+8005
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0+8003 <_start\+0x3> bra 0+8000 <_start>
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0+8003 <_start\+0x3> bra 0+8000 <_start>
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